HEAL DSpace

Scaling issues in an 0.1μm CMOS technology with EKV3.0

DSpace/Manakin Repository

Show simple item record

dc.contributor.author Kitonaki, E en
dc.contributor.author Bazigos, A en
dc.contributor.author Bucher, M en
dc.contributor.author Puchner, H en
dc.contributor.author Bhardwaj, S en
dc.contributor.author Papananos, Y en
dc.date.accessioned 2014-03-01T02:50:52Z
dc.date.available 2014-03-01T02:50:52Z
dc.date.issued 2006 en
dc.identifier.uri http://hdl.handle.net/123456789/35174
dc.relation.uri http://www.scopus.com/inward/record.url?eid=2-s2.0-41549092888&partnerID=40&md5=80c262f297397811135b41d1ba400b56 en
dc.subject CMOS 0.15um en
dc.subject EKV3.0 en
dc.subject MOSFET modelling en
dc.subject Temperature analysis en
dc.subject Threshold voltage scaling versus width and length en
dc.subject.other Electric currents en
dc.subject.other Mathematical models en
dc.subject.other MOS devices en
dc.subject.other Temperature measurement en
dc.subject.other MOSFET modeling en
dc.subject.other Temperature analysis en
dc.subject.other CMOS integrated circuits en
dc.title Scaling issues in an 0.1μm CMOS technology with EKV3.0 en
heal.type conferenceItem en
heal.identifier.secondary 1706557 en
heal.publicationDate 2006 en
heal.abstract Application of the EKV3.0 model to an 0.15um CMOS technology with single poly, and buried channel PMOS, is presented with emphasis on scaling properties of the technology and the model. The EKV3.0 model is illustrated for its fit to NMOS and PMOS drain current, transconductances and output characteristics in weak, moderate and strong inversion over a large temperature range. Scaling properties of the technology and the model are illustrated with fits versus channel length and width. The model is also compared to measured capacitance-voltage characteristics. Furthermore, some comparisons to a BSIM3v3 model for the same technology are provided. Copyright © 2006 by Department of Microelectronics & Computer Science, Technical University of Lodz. en
heal.journalName Proceedings of the International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2006 en
dc.identifier.spage 151 en
dc.identifier.epage 158 en


Files in this item

Files Size Format View

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record