Fast implementation of binary morphological operations on hardware-efficient systolic architectures

Malamas, EN; Malamos, AG; Varvarigou, TA

dc.contributor.author	Malamas, EN	en
dc.contributor.author	Malamos, AG	en
dc.contributor.author	Varvarigou, TA	en
dc.date.accessioned	2014-03-01T01:15:37Z
dc.date.available	2014-03-01T01:15:37Z
dc.date.issued	2000	en
dc.identifier.issn	0922-5773	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/13625
dc.subject	Morphological Operation	en
dc.subject	Resource Utilization	en
dc.subject.classification	Computer Science, Information Systems	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	DECOMPOSITION	en
dc.title	Fast implementation of binary morphological operations on hardware-efficient systolic architectures	en
heal.type	journalArticle	en
heal.identifier.primary	10.1023/A:1008177620106	en
heal.identifier.secondary	http://dx.doi.org/10.1023/A:1008177620106	en
heal.language	English	en
heal.publicationDate	2000	en
heal.abstract	In this paper we present novel systolic architectures for the fast execution of common morphological operations, that is dilation, erosion, closing, and opening. Their novelty stems from the fact that the same unit, the combined Erosion-Dilation Architecture (EDA), is used to perform either dilation, or erosion, or both of them in parallel (depending on control signals). The proposed architectures show a major advantage on using reduced resources for storing the structuring element (SE), lead to full resource utilization, and provide high processing rates. We concentrate on 1-dim structuring elements and present an improved architecture, that performs dilation and erosion in half the time compared to other architectures, using a workload partitioning technique. Furthermore, the amenability of the EDA to VLSI implementation is exemplified by a processor that performs binary morphological operations with 1 x 3 structuring sets. Finally, we show that the modularity of the proposed architectures allows the direct extension to 2-dim morphology.	en
heal.publisher	KLUWER ACADEMIC PUBL	en
heal.journalName	JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY	en
dc.identifier.doi	10.1023/A:1008177620106	en
dc.identifier.isi	ISI:000086532500005	en
dc.identifier.volume	25	en
dc.identifier.issue	1	en
dc.identifier.spage	79	en
dc.identifier.epage	93	en