New parallel implementations for DTW algorithms

Stainhaouer Gregory, N; Carayannis, George

dc.contributor.author	Stainhaouer Gregory, N	en
dc.contributor.author	Carayannis, George	en
dc.date.accessioned	2014-03-01T01:08:03Z
dc.date.available	2014-03-01T01:08:03Z
dc.date.issued	1990	en
dc.identifier.issn	0096-3518	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/10256
dc.subject.classification	Acoustics	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Computer Architecture	en
dc.subject.other	Integrated Circuits, VLSI	en
dc.subject.other	Signal Processing	en
dc.subject.other	Dynamic Time Warping	en
dc.subject.other	Processing Elements	en
dc.subject.other	Computer Programming	en
dc.title	New parallel implementations for DTW algorithms	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/29.52710	en
heal.identifier.secondary	http://dx.doi.org/10.1109/29.52710	en
heal.language	English	en
heal.publicationDate	1990	en
heal.abstract	The parallel realization of a popular dynamic time warping (DTW) algorithm is discussed. Two alternative techniques are proposed, one based on a circular array and the other using a linear array of processing elements (PEs). The architecture of each PE is defined in both cases and computational phases are outlined. The number of PEs is not restricted to be fixed. With small modifications, both of the techniques can implement DTW with any number of PEs available. The performance of the new architectures is superior to that of architectures previously reported in the literature.	en
heal.publisher	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC	en
heal.journalName	IEEE Transactions on Acoustics, Speech, and Signal Processing	en
dc.identifier.doi	10.1109/29.52710	en
dc.identifier.isi	ISI:A1990DA51100012	en
dc.identifier.volume	38	en
dc.identifier.issue	4	en
dc.identifier.spage	705	en
dc.identifier.epage	711	en