Linear, electronically tunable resistor

Tsividis, Y; Vavelidis, K

dc.contributor.author	Tsividis, Y	en
dc.contributor.author	Vavelidis, K	en
dc.date.accessioned	2014-03-01T01:09:26Z
dc.date.available	2014-03-01T01:09:26Z
dc.date.issued	1993	en
dc.identifier.issn	0013-5194	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/10983
dc.relation.uri	http://www.scopus.com/inward/record.url?eid=2-s2.0-0027569289&partnerID=40&md5=9c00c0da8d1a548f0a235553a002aa1d	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Charge carriers	en
dc.subject.other	Electric current measurement	en
dc.subject.other	Gates (transistor)	en
dc.subject.other	Linear networks	en
dc.subject.other	Linearization	en
dc.subject.other	MOSFET devices	en
dc.subject.other	Tuning	en
dc.subject.other	Linear electronically tunable resistor	en
dc.subject.other	Surface carriers	en
dc.subject.other	Resistors	en
dc.title	Linear, electronically tunable resistor	en
heal.type	journalArticle	en
heal.language	English	en
heal.publicationDate	1993	en
heal.abstract	A method to linearise the channel of a MOSFET by applying appropriate bias voltages across its gate and body (both considered as resistors) has recently been published [A]. We would like to add one paper [B] to the list of References; in that paper, the application of bias across a resistive gate has been reported as part of a procedure for measuring carrier velocity.	en
heal.publisher	IEE-INST ELEC ENG	en
heal.journalName	Electronics Letters	en
dc.identifier.isi	ISI:A1993LB76900032	en
dc.identifier.volume	29	en
dc.identifier.issue	6	en
dc.identifier.spage	556	en
dc.identifier.epage	557	en