dc.contributor.author |
MILLER, R |
en |
dc.contributor.author |
PRASANNAKUMAR, VK |
en |
dc.contributor.author |
REISIS, DI |
en |
dc.contributor.author |
STOUT, QF |
en |
dc.date.accessioned |
2014-03-01T01:09:30Z |
|
dc.date.available |
2014-03-01T01:09:30Z |
|
dc.date.issued |
1993 |
en |
dc.identifier.issn |
0018-9340 |
en |
dc.identifier.uri |
https://dspace.lib.ntua.gr/xmlui/handle/123456789/11029 |
|
dc.subject |
GRAPH ALGORITHMS |
en |
dc.subject |
IMAGE ALGORITHMS |
en |
dc.subject |
MESH |
en |
dc.subject |
MESH-OF-TREES |
en |
dc.subject |
PARALLEL ALGORITHMS |
en |
dc.subject |
PRAM |
en |
dc.subject |
PYRAMID COMPUTER |
en |
dc.subject |
RECONFIGURABLE MESH |
en |
dc.subject |
VLSI |
en |
dc.subject.classification |
Computer Science, Hardware & Architecture |
en |
dc.subject.classification |
Engineering, Electrical & Electronic |
en |
dc.subject.other |
INFORMATION-TRANSFER |
en |
dc.subject.other |
FINDING MAXIMUM |
en |
dc.subject.other |
ARRAY |
en |
dc.subject.other |
ALGORITHMS |
en |
dc.subject.other |
COMPUTERS |
en |
dc.title |
PARALLEL COMPUTATIONS ON RECONFIGURABLE MESHES |
en |
heal.type |
journalArticle |
en |
heal.identifier.primary |
10.1109/12.277290 |
en |
heal.identifier.secondary |
http://dx.doi.org/10.1109/12.277290 |
en |
heal.language |
English |
en |
heal.publicationDate |
1993 |
en |
heal.abstract |
This paper introduces the mesh with reconfigurable bus (reconfigurable mesh) as a model of computation. The reconfigurable mesh captures salient features from a variety of sources, including the CAAPP, CHiP, polymorphic-torus network, and bus automaton. It consists of an array of processors interconnected by a reconfigurable bus system, which can be used to dynamically obtain various interconnection patterns between the processors. In this paper, we introduce a variety of fundamental data-movement operations for the reconfigurable mesh. Based on these operations, we also introduce new algorithms that are efficient for solving a variety of problems involving graphs and digitized images. The algorithms we present are asymptotically superior to those previously obtained for the aforementioned reconfigurable architectures, as well as to those previously obtained for the mesh, the mesh with multiple broadcasting, the mesh with multiple buses, the mesh-of-trees, and the pyramid computer, to name a few. Highlights include a logarithmic time algorithm to label the connected components of a graph given its adjacency matrix, as well as polylogarithmic time algorithms to solve problems involving convexity and connectivity of figures in images. We also show the power of reconfigurability by solving some problems, such as exclusive OR, more efficiently on the reconfigurable mesh than is possible on the PRAM. |
en |
heal.publisher |
IEEE COMPUTER SOC |
en |
heal.journalName |
IEEE TRANSACTIONS ON COMPUTERS |
en |
dc.identifier.doi |
10.1109/12.277290 |
en |
dc.identifier.isi |
ISI:A1993LW40400004 |
en |
dc.identifier.volume |
42 |
en |
dc.identifier.issue |
6 |
en |
dc.identifier.spage |
678 |
en |
dc.identifier.epage |
692 |
en |