dc.contributor.author |
Pekmestzi, KZ |
en |
dc.date.accessioned |
2014-03-01T01:14:51Z |
|
dc.date.available |
2014-03-01T01:14:51Z |
|
dc.date.issued |
1999 |
en |
dc.identifier.issn |
0018-9340 |
en |
dc.identifier.uri |
https://dspace.lib.ntua.gr/xmlui/handle/123456789/13248 |
|
dc.subject |
Array multipliers |
en |
dc.subject |
Multiplication algorithm |
en |
dc.subject |
Pipeline multipliers |
en |
dc.subject |
Two's complement multiplication |
en |
dc.subject.classification |
Computer Science, Hardware & Architecture |
en |
dc.subject.classification |
Engineering, Electrical & Electronic |
en |
dc.subject.other |
Algorithms |
en |
dc.subject.other |
Digital arithmetic |
en |
dc.subject.other |
Interconnection networks |
en |
dc.subject.other |
Iterative methods |
en |
dc.subject.other |
Parallel processing systems |
en |
dc.subject.other |
Pipeline processing systems |
en |
dc.subject.other |
Array multipliers |
en |
dc.subject.other |
Pipeline multipliers |
en |
dc.subject.other |
Multiplying circuits |
en |
dc.title |
Multiplexer-based array multipliers |
en |
heal.type |
journalArticle |
en |
heal.identifier.primary |
10.1109/12.743408 |
en |
heal.identifier.secondary |
http://dx.doi.org/10.1109/12.743408 |
en |
heal.language |
English |
en |
heal.publicationDate |
1999 |
en |
heal.abstract |
A new algorithm for the multiplication of two n-bit numbers based on the synchronous computation of the partial sums of the two operands is presented. The proposed algorithm permits an efficient realization of the parallel multiplication using iterative arrays. At the same time, it permits high-speed operation. Multiplier arrays for positive numbers and numbers in two's complement form based on the proposed technique are implemented. Also, an efficient pipeline form of the proposed multiplication scheme is introduced. All multipliers obtained have low circuit complexity permitting high-speed operation and the interconnections of the cells are regular, well-suited for VLSI realization. © 1999 IEEE. |
en |
heal.publisher |
IEEE COMPUTER SOC |
en |
heal.journalName |
IEEE Transactions on Computers |
en |
dc.identifier.doi |
10.1109/12.743408 |
en |
dc.identifier.isi |
ISI:000078192700002 |
en |
dc.identifier.volume |
48 |
en |
dc.identifier.issue |
1 |
en |
dc.identifier.spage |
15 |
en |
dc.identifier.epage |
23 |
en |