A novel systolic architecture for an efficient RSA implementation

Moshopoulos, NK; Pekmestzi, KZ

dc.contributor.author	Moshopoulos, NK	en
dc.contributor.author	Pekmestzi, KZ	en
dc.date.accessioned	2014-03-01T01:16:02Z
dc.date.available	2014-03-01T01:16:02Z
dc.date.issued	2001	en
dc.identifier.issn	0302-9743	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/13893
dc.subject	High Speed	en
dc.subject.classification	Computer Science, Theory & Methods	en
dc.subject.other	MODULAR MULTIPLICATION	en
dc.subject.other	ALGORITHM	en
dc.subject.other	CRYPTOSYSTEM	en
dc.title	A novel systolic architecture for an efficient RSA implementation	en
heal.type	journalArticle	en
heal.identifier.primary	10.1007/3-540-44586-2_30	en
heal.identifier.secondary	http://dx.doi.org/10.1007/3-540-44586-2_30	en
heal.language	English	en
heal.publicationDate	2001	en
heal.abstract	A new systolic serial-parallel scheme that implements the Montgomery multiplier is presented. The serial input of this multiplier consists of two sets of data that enter in a bit-interleaved form. The results are also derived in the same form. The design, with minor modifications, can be used for the implementation of the RSA algorithm. The circuit yields low hardware complexity and permits high-speed operation with 100% efficiency.	en
heal.publisher	SPRINGER-VERLAG BERLIN	en
heal.journalName	PUBLIC KEY CRYPTOGRAPHY, PROCEEDINGS	en
heal.bookName	LECTURE NOTES IN COMPUTER SCIENCE	en
dc.identifier.doi	10.1007/3-540-44586-2_30	en
dc.identifier.isi	ISI:000174202400030	en
dc.identifier.volume	1992	en
dc.identifier.spage	416	en
dc.identifier.epage	421	en