A Monte Carlo approach for maximum power estimation based on extreme value theory

Evmorfopoulos, NE; Stamoulis, GI; Avaritsiotis, JN

dc.contributor.author	Evmorfopoulos, NE	en
dc.contributor.author	Stamoulis, GI	en
dc.contributor.author	Avaritsiotis, JN	en
dc.date.accessioned	2014-03-01T01:17:22Z
dc.date.available	2014-03-01T01:17:22Z
dc.date.issued	2002	en
dc.identifier.issn	0278-0070	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/14488
dc.subject	Extreme value theory	en
dc.subject	Maximum power estimation	en
dc.subject	Statistical simulation	en
dc.subject.classification	Computer Science, Hardware & Architecture	en
dc.subject.classification	Computer Science, Interdisciplinary Applications	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Algorithms	en
dc.subject.other	CMOS integrated circuits	en
dc.subject.other	Computer simulation	en
dc.subject.other	Integrated circuit layout	en
dc.subject.other	Monte Carlo methods	en
dc.subject.other	Probability distributions	en
dc.subject.other	Extreme value theory	en
dc.subject.other	VLSI circuits	en
dc.title	A Monte Carlo approach for maximum power estimation based on extreme value theory	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/43.992765	en
heal.identifier.secondary	http://dx.doi.org/10.1109/43.992765	en
heal.language	English	en
heal.publicationDate	2002	en
heal.abstract	A Monte Carlo approach for maximum power estimation in CMOS very large scale integration (VLSI) circuits is proposed in this paper. The approach is based on the largely unexploited area of statistics known as extreme value theory. Within this framework, it attempts to appropriately model the extreme behavior of the probability distribution of the peak instantaneous power drawn from the power supply bus, in order to yield a close estimate of its maximum possible value. The approach features a relatively small number of necessary input patterns that does not depend on the circuit size, user-specified accuracy, and confidence levels for the final estimate, simplicity in the algorithmic implementation, noniterative single-loop execution, highly accurate simulation-based operation, and easy integration within the design flow of CMOS VLSI circuits. Experimental results establish the above claims and demonstrate the overall efficiency of the proposed approach to address the problem of maximum power estimation.	en
heal.publisher	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC	en
heal.journalName	IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems	en
dc.identifier.doi	10.1109/43.992765	en
dc.identifier.isi	ISI:000174664000004	en
dc.identifier.volume	21	en
dc.identifier.issue	4	en
dc.identifier.spage	415	en
dc.identifier.epage	432	en