A systolic, high speed architecture for an RSA cryptosystem

Pekmestzi, KZ; Moshopoulos, NK

dc.contributor.author	Pekmestzi, KZ	en
dc.contributor.author	Moshopoulos, NK	en
dc.date.accessioned	2014-03-01T01:17:24Z
dc.date.available	2014-03-01T01:17:24Z
dc.date.issued	2002	en
dc.identifier.issn	0922-5773	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/14511
dc.subject	Modular multiplication	en
dc.subject	Modular squaring	en
dc.subject	Montgomery algorithm	en
dc.subject	Public key cryptography	en
dc.subject	RSA	en
dc.subject.classification	Computer Science, Information Systems	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Adders	en
dc.subject.other	Algorithms	en
dc.subject.other	Public key cryptography	en
dc.subject.other	Systolic arrays	en
dc.subject.other	Modular multiplication	en
dc.subject.other	Montgomery algorithm	en
dc.subject.other	Serial parallel multipliers	en
dc.subject.other	VLSI circuits	en
dc.title	A systolic, high speed architecture for an RSA cryptosystem	en
heal.type	journalArticle	en
heal.identifier.primary	10.1023/A:1020264818843	en
heal.identifier.secondary	http://dx.doi.org/10.1023/A:1020264818843	en
heal.language	English	en
heal.publicationDate	2002	en
heal.abstract	An architecture based on the RSA public key cryptography algorithm is presented. The circuit includes two components, one for modular squaring and one for modular multiplication. Each component is based on the Montgomery algorithm and implements the modular operations using two modified serial-parallel multipliers. A full modular exponentiation is completed every n(n + 3) clock cycles. All circuits are systolic, operate with 100% efficiency and their maximum combinational delay is equal to one gated Full-Adder. Thus, high-speed performance is achieved while the low cell hardware complexity enables an efficient VLSI implementation.	en
heal.publisher	KLUWER ACADEMIC PUBL	en
heal.journalName	Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology	en
dc.identifier.doi	10.1023/A:1020264818843	en
dc.identifier.isi	ISI:000178057500002	en
dc.identifier.volume	32	en
dc.identifier.issue	3	en
dc.identifier.spage	223	en
dc.identifier.epage	235	en