Microprocessor adapter for ATM networks

Koukos, AK; Evagelatos, AF

dc.contributor.author	Koukos, AK	en
dc.contributor.author	Evagelatos, AF	en
dc.date.accessioned	2014-03-01T01:18:03Z
dc.date.available	2014-03-01T01:18:03Z
dc.date.issued	2002	en
dc.identifier.issn	0141-9331	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/14772
dc.subject	ATM connection identification and classification	en
dc.subject	ATM header error control	en
dc.subject	ATM microprocessor adapter	en
dc.subject	ATM network	en
dc.subject	ATM traffic shaper	en
dc.subject	ATM transmitter and receiver	en
dc.subject.classification	Computer Science, Hardware & Architecture	en
dc.subject.classification	Computer Science, Theory & Methods	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Application specific integrated circuits	en
dc.subject.other	Data transfer	en
dc.subject.other	Error correction	en
dc.subject.other	Internet	en
dc.subject.other	Local area networks	en
dc.subject.other	Microprocessor chips	en
dc.subject.other	Network protocols	en
dc.subject.other	Routers	en
dc.subject.other	Telecommunication traffic	en
dc.subject.other	Microprocessor adapters	en
dc.subject.other	Asynchronous transfer mode	en
dc.title	Microprocessor adapter for ATM networks	en
heal.type	journalArticle	en
heal.identifier.primary	10.1016/S0141-9331(02)00024-8	en
heal.identifier.secondary	http://dx.doi.org/10.1016/S0141-9331(02)00024-8	en
heal.language	English	en
heal.publicationDate	2002	en
heal.abstract	This paper presents a microprocessor adapter for ATM networks. Its transmission functions, which are related to the upstream direction, include cell buffering, header error control, cell assembling, rate coupling, and information insertion. The reception functions, which are related to the downstream direction, include information extraction, rate decoupling, cell buffering, header error detection and correction, cell delineation, connection identity fields extraction and identification, cell disassembling and classification, and idle cell discarding. The transmission direction can be supported optionally by a traffic shaper, which is responsible for adapting emitted traffic to ATM network. The microprocessor adapter, which can be used in terminals or in interworking units and switches, implements basic functions of the lower layers of the ATM protocol reference model. It uses three applications specific integrated circuit (ASIC) chips. The three chip-set and other logic can been used to develop a personal computer (PC) adapter for ATM networks. This PC adapter offers bulk data transfer across the ATM network, internet applications over TCP/IP, interactive applications, LAN-ATM interworking facilities using a PC as a router, multimedia and other services. (C) 2002 Elsevier Science B.V. All rights reserved.	en
heal.publisher	ELSEVIER SCIENCE BV	en
heal.journalName	Microprocessors and Microsystems	en
dc.identifier.doi	10.1016/S0141-9331(02)00024-8	en
dc.identifier.isi	ISI:000176086100004	en
dc.identifier.volume	26	en
dc.identifier.issue	5	en
dc.identifier.spage	233	en
dc.identifier.epage	241	en