An embedded microprocessor for intelligent control

Panagopoulos, I; Pavlatos, C; Papakonstantinou, G

dc.contributor.author	Panagopoulos, I	en
dc.contributor.author	Pavlatos, C	en
dc.contributor.author	Papakonstantinou, G	en
dc.date.accessioned	2014-03-01T01:21:48Z
dc.date.available	2014-03-01T01:21:48Z
dc.date.issued	2005	en
dc.identifier.issn	0921-0296	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/16384
dc.subject	Declarative programs	en
dc.subject	Embedded systems	en
dc.subject	Intelligent control	en
dc.subject	Logic programming	en
dc.subject	Microprocessor	en
dc.subject	RISC	en
dc.subject.classification	Computer Science, Artificial Intelligence	en
dc.subject.classification	Robotics	en
dc.subject.other	Computer software	en
dc.subject.other	Embedded systems	en
dc.subject.other	Logic programming	en
dc.subject.other	Mathematical transformations	en
dc.subject.other	Microprocessor chips	en
dc.subject.other	Product design	en
dc.subject.other	Reduced instruction set computing	en
dc.subject.other	Computed deviations	en
dc.subject.other	Declarative programs	en
dc.subject.other	Hybrid applications	en
dc.subject.other	Parser	en
dc.subject.other	Intelligent control	en
dc.title	An embedded microprocessor for intelligent control	en
heal.type	journalArticle	en
heal.identifier.primary	10.1007/s10846-004-4107-z	en
heal.identifier.secondary	http://dx.doi.org/10.1007/s10846-004-4107-z	en
heal.language	English	en
heal.publicationDate	2005	en
heal.abstract	The conventional approach for the implementation of the knowledge base of a planning agent, on an intelligent embedded system, is solely of software nature. It requires the existence of a compiler that transforms the initial declarative logic program, specifying the knowledge base, to its equivalent procedural one, to be programmed to the embedded system's microprocessor. This practice increases the complexity of the final implementation (the declarative to sequential transformation adds a great amount of software code for simulating the declarative execution) and reduces the overall system's performance (logic derivations require the use of a stack and a great number of jump instructions for their evaluation). The design of specialized hardware implementations, which are only capable of supporting logic programs, in an effort to resolve the aforementioned problems, introduces limitations in their use in applications where logic programs need to be intertwined with traditional procedural ones in a desired application. In this paper, we exploit HW/SW codesign methods to present a microprocessor, capable of supporting hybrid applications using both programming approaches. We take advantage of the close relationship between attribute grammar (AG) evaluation and knowledge engineering methods to present a programmable hardware parser that performs logic derivations and combine it with an extension of a conventional RISC microprocessor that performs the unification process to report the success or failure of logic derivations. The extended RISC microprocessor is still capable of executing conventional procedural programs, thus hybrid applications can be implemented. The presented implementation increases the performance of logic derivations for the control inference process (experimental analysis yields an approximate 1000% - 10 times increase in performance) and reduces the complexity of the final implemented code through the introduction of an extended C language called C-AG that simplifies the programming of hybrid procedural-declarative applications. © Springer 2005.	en
heal.publisher	SPRINGER	en
heal.journalName	Journal of Intelligent and Robotic Systems: Theory and Applications	en
dc.identifier.doi	10.1007/s10846-004-4107-z	en
dc.identifier.isi	ISI:000228886200004	en
dc.identifier.volume	42	en
dc.identifier.issue	2	en
dc.identifier.spage	179	en
dc.identifier.epage	211	en