Packet indexing process optimized for high-speed network processors

Charopoulos, C; Andritsopoulos, F; Mitsos, Y; Doumenis, G; Stasinopoulos, G

dc.contributor.author	Charopoulos, C	en
dc.contributor.author	Andritsopoulos, F	en
dc.contributor.author	Mitsos, Y	en
dc.contributor.author	Doumenis, G	en
dc.contributor.author	Stasinopoulos, G	en
dc.date.accessioned	2014-03-01T01:22:54Z
dc.date.available	2014-03-01T01:22:54Z
dc.date.issued	2005	en
dc.identifier.issn	0218-1266	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/16711
dc.subject	CAM	en
dc.subject	Collisions	en
dc.subject	Hashing	en
dc.subject	Lookup	en
dc.subject	Network processor	en
dc.subject	Packet indexing	en
dc.subject.classification	Computer Science, Hardware & Architecture	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Computer aided manufacturing	en
dc.subject.other	Computer hardware	en
dc.subject.other	Computer networks	en
dc.subject.other	Data acquisition	en
dc.subject.other	Indexing (of information)	en
dc.subject.other	Optimization	en
dc.subject.other	Packet networks	en
dc.subject.other	Storage allocation (computer)	en
dc.subject.other	Collisions	en
dc.subject.other	Hashing	en
dc.subject.other	Lookup	en
dc.subject.other	Network processor	en
dc.subject.other	Packet indexing	en
dc.subject.other	Program processors	en
dc.title	Packet indexing process optimized for high-speed network processors	en
heal.type	journalArticle	en
heal.identifier.primary	10.1142/S0218126605002623	en
heal.identifier.secondary	http://dx.doi.org/10.1142/S0218126605002623	en
heal.language	English	en
heal.publicationDate	2005	en
heal.abstract	Most network processors perform some kind of classification on the received packet stream, according to criteria set by the implemented networking application. Packet indexing is an integral part of the packet classification process. Indexing is considered as one of the most processor intensive part of network processing and is often supported by special hardware units. High performance Network processors usually rely upon Content Addressable Memories (CAMs) for the indexing of millions of packets per second into discrete ""flow Identifiers"" in ATM and IP networks. Most often, the indexing process examines packet data (tags) of significant size, necessitating the use of large CAM devices. This paper proposes an alternative method for searching lengthy tags, using RAM as storage medium instead of the expensive and complex CAMs. The technique applies the open-addressing hashing methodology to provide high speed lookups, close to CAM's performance. Our approach handles efficiently the limitations imposed by the hashing algorithms by appropriately selecting system parameters and resolving hashing collisions. The advantages of the proposed method are evaluated in detail. © World Scientific Publishing Company.	en
heal.publisher	WORLD SCIENTIFIC PUBL CO PTE LTD	en
heal.journalName	Journal of Circuits, Systems and Computers	en
dc.identifier.doi	10.1142/S0218126605002623	en
dc.identifier.isi	ISI:000232702300011	en
dc.identifier.volume	14	en
dc.identifier.issue	4	en
dc.identifier.spage	841	en
dc.identifier.epage	860	en