A low-power wideband reconfigurable integrated active-RC filter with 73 dB SFDR

Vasilopoulos, A; Vitzilaios, G; Theodoratos, G; Papananos, Y

dc.contributor.author	Vasilopoulos, A	en
dc.contributor.author	Vitzilaios, G	en
dc.contributor.author	Theodoratos, G	en
dc.contributor.author	Papananos, Y	en
dc.date.accessioned	2014-03-01T01:23:25Z
dc.date.available	2014-03-01T01:23:25Z
dc.date.issued	2006	en
dc.identifier.issn	0018-9200	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/16955
dc.subject	Active-RC filter	en
dc.subject	Compensation technique	en
dc.subject	Low power	en
dc.subject	Operational amplifiers	en
dc.subject	Programmable resistor arrays	en
dc.subject	Tuning circuit	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Active-RC filter	en
dc.subject.other	Compensation technique	en
dc.subject.other	Low power	en
dc.subject.other	Programmable resistor arrays	en
dc.subject.other	Tuning circuit	en
dc.subject.other	Bandwidth	en
dc.subject.other	Electric currents	en
dc.subject.other	Operational amplifiers	en
dc.subject.other	Polysilicon	en
dc.subject.other	Resistors	en
dc.subject.other	Tuning	en
dc.subject.other	Electric filters	en
dc.title	A low-power wideband reconfigurable integrated active-RC filter with 73 dB SFDR	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/JSSC.2006.880616	en
heal.identifier.secondary	http://dx.doi.org/10.1109/JSSC.2006.880616	en
heal.identifier.secondary	1683891	en
heal.language	English	en
heal.publicationDate	2006	en
heal.abstract	In this paper, a low-power, highly linear, integrated, active-RC filter exhibiting a reconfigurable transfer function (Chebyshev, Elliptic) and bandwidth (5 MHz, 10 MHz), is presented. The filter exploits digitally-controlled polysilicon resistor banks and a digital automatic tuning scheme to account for process and temperature variations. The operational amplifiers used are based on a new compensation technique that allows optimized high-frequency filter performance and minimized current consumption. A filter prototype has been fabricated in a 0.12-μm CMOS process, occupies 0.25 mm2 (tuning circuit included), and achieves an IIP3 of approximately +20 dBm, whereas its spurious free dynamic range (SFDR) reaches 73 dB. The dissipation of the filter core and the tuning circuit is 4.6 mW and 1.5 mW, respectively. © 2006 IEEE.	en
heal.publisher	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC	en
heal.journalName	IEEE Journal of Solid-State Circuits	en
dc.identifier.doi	10.1109/JSSC.2006.880616	en
dc.identifier.isi	ISI:000240077100004	en
dc.identifier.volume	41	en
dc.identifier.issue	9	en
dc.identifier.spage	1997	en
dc.identifier.epage	2008	en