Design and implementation of a fast digital fuzzy logic controller using FPGA technology

Deliparaschos, KM; Nenedakis, FI; Tzafestas, SG

dc.contributor.author	Deliparaschos, KM	en
dc.contributor.author	Nenedakis, FI	en
dc.contributor.author	Tzafestas, SG	en
dc.date.accessioned	2014-03-01T01:23:55Z
dc.date.available	2014-03-01T01:23:55Z
dc.date.issued	2006	en
dc.identifier.issn	0921-0296	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/17142
dc.subject	Digital fuzzy logic controller	en
dc.subject	Odd-even method	en
dc.subject	Place and route	en
dc.subject	Register transfer level	en
dc.subject	Synthesis	en
dc.subject	Very high-speed hardware description language	en
dc.subject.classification	Computer Science, Artificial Intelligence	en
dc.subject.classification	Robotics	en
dc.subject.other	Computational complexity	en
dc.subject.other	Computer hardware	en
dc.subject.other	Control equipment	en
dc.subject.other	Field programmable gate arrays	en
dc.subject.other	Mathematical models	en
dc.subject.other	Parameter estimation	en
dc.subject.other	Digital fuzzy logic controller	en
dc.subject.other	Odd-even method	en
dc.subject.other	Place and route	en
dc.subject.other	Register transfer level	en
dc.subject.other	Very high-speed hardware description language	en
dc.subject.other	Fuzzy control	en
dc.title	Design and implementation of a fast digital fuzzy logic controller using FPGA technology	en
heal.type	journalArticle	en
heal.identifier.primary	10.1007/s10846-005-9016-2	en
heal.identifier.secondary	http://dx.doi.org/10.1007/s10846-005-9016-2	en
heal.language	English	en
heal.publicationDate	2006	en
heal.abstract	Fuzzy logic controllers (FLCs) are finding increasing popularity in real industrial applications, especially when the available system models are inexact or unavailable. This paper proposes a zero-order Takagi-Sugeno parameterized digital FLC, processing only the active rules (rules that give a non-null contribution for a given input data set), at high frequency of operation, without significant increase in hardware complexity. To achieve this goal, an improved method of designing the fuzzy controller model is proposed that significantly reduces the time required to process the active rules and effectively increases the input data processing rate. The digital fuzzy logic controller discussed in this paper achieves an internal core processing speed of at least 200 MHz, featuring two 8-bit inputs and one 12-bit output, with up to seven trapezoidal shape membership functions per input and a rule base of up to 49 rules. The proposed architecture was implemented in a field programmable gate array chip with the use of a very high-speed integrated-circuits hardware description language and advanced synthesis and place and route tools. © Springer 2006.	en
heal.publisher	SPRINGER	en
heal.journalName	Journal of Intelligent and Robotic Systems: Theory and Applications	en
dc.identifier.doi	10.1007/s10846-005-9016-2	en
dc.identifier.isi	ISI:000238385500005	en
dc.identifier.volume	45	en
dc.identifier.issue	1	en
dc.identifier.spage	77	en
dc.identifier.epage	96	en