Metal nano-floating gate memory devices fabricated at low temperature

Koliopoulou, S; Dimitrakis, P; Goustouridis, D; Normand, P; Pearson, C; Petty, MC; Radamson, H; Tsoukalas, D

dc.contributor.author	Koliopoulou, S	en
dc.contributor.author	Dimitrakis, P	en
dc.contributor.author	Goustouridis, D	en
dc.contributor.author	Normand, P	en
dc.contributor.author	Pearson, C	en
dc.contributor.author	Petty, MC	en
dc.contributor.author	Radamson, H	en
dc.contributor.author	Tsoukalas, D	en
dc.date.accessioned	2014-03-01T01:24:38Z
dc.date.available	2014-03-01T01:24:38Z
dc.date.issued	2006	en
dc.identifier.issn	0167-9317	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/17367
dc.subject	Hybrid electronics	en
dc.subject	Langmuir-Blodgett deposition	en
dc.subject	Memory	en
dc.subject	Nanoparticles	en
dc.subject	SiGe	en
dc.subject	Wafer bonding	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.classification	Nanoscience & Nanotechnology	en
dc.subject.classification	Optics	en
dc.subject.classification	Physics, Applied	en
dc.subject.other	Data storage equipment	en
dc.subject.other	Fabrication	en
dc.subject.other	Insulating materials	en
dc.subject.other	Low temperature engineering	en
dc.subject.other	Microelectronic processing	en
dc.subject.other	MOSFET devices	en
dc.subject.other	Nanostructured materials	en
dc.subject.other	ROM	en
dc.subject.other	Semiconducting silicon	en
dc.subject.other	Silicon wafers	en
dc.subject.other	Gate stack materials	en
dc.subject.other	Hybrid electronics	en
dc.subject.other	Langmuir-Blodgett deposition	en
dc.subject.other	Organic insulator	en
dc.subject.other	Voltage pulses	en
dc.subject.other	Wafer bonding's	en
dc.subject.other	Gates (transistor)	en
dc.title	Metal nano-floating gate memory devices fabricated at low temperature	en
heal.type	journalArticle	en
heal.identifier.primary	10.1016/j.mee.2006.01.235	en
heal.identifier.secondary	http://dx.doi.org/10.1016/j.mee.2006.01.235	en
heal.language	English	en
heal.publicationDate	2006	en
heal.abstract	In this communication, we report on the realization of low-temperature processed Electrically Erasable Programmable Read-Only Memory (EEPROM) like device with embedded gold nanoparticles. The realization is based on the fabrication of a V-groove SiGe Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the functionalization of a gate oxide followed by self-assembly of gold nanoparticles and finally, the deposition of an organic insulator by Langmuir-Blodgett (LB) technique. Such structures were processed at a temperature lower than 400 degrees C. The electrical characteristics of the final hybrid Metal Insulator Semiconductor FET (MISFET) memory cells were evaluated in terms of memory window and program/erase voltage pulses. A model describing the memory characteristics, based on the electronic properties of the gate stack materials, is presented. (c) 2006 Elsevier B.V. All rights reserved.	en
heal.publisher	ELSEVIER SCIENCE BV	en
heal.journalName	Microelectronic Engineering	en
dc.identifier.doi	10.1016/j.mee.2006.01.235	en
dc.identifier.isi	ISI:000237581900228	en
dc.identifier.volume	83	en
dc.identifier.issue	4-9 SPEC. ISS.	en
dc.identifier.spage	1563	en
dc.identifier.epage	1566	en