A novel four-level voltage source inverter - Influence of switching strategies on the distribution of power losses

Perantzakis, GS; Xepapas, FH; Manias, SN

dc.contributor.author	Perantzakis, GS	en
dc.contributor.author	Xepapas, FH	en
dc.contributor.author	Manias, SN	en
dc.date.accessioned	2014-03-01T01:25:43Z
dc.date.available	2014-03-01T01:25:43Z
dc.date.issued	2007	en
dc.identifier.issn	0885-8993	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/17746
dc.subject	DC-Link capacitor voltage balance	en
dc.subject	Multilevel voltage source inverter (VSI)	en
dc.subject	Semiconductor device power losses	en
dc.subject	Sinusoidal pulsewidth modulation (SPWM)	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Capacitors	en
dc.subject.other	Computer simulation	en
dc.subject.other	Electric losses	en
dc.subject.other	Electric potential	en
dc.subject.other	Semiconductor switches	en
dc.subject.other	Topology	en
dc.subject.other	Capacitor voltage balance	en
dc.subject.other	Inverter topology	en
dc.subject.other	Multilevel voltage source inverter	en
dc.subject.other	Semiconductor device power losses	en
dc.subject.other	Sinusoidal pulsewidth modulation (SPWM)	en
dc.subject.other	Electric inverters	en
dc.title	A novel four-level voltage source inverter - Influence of switching strategies on the distribution of power losses	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/TPEL.2006.886627	en
heal.identifier.secondary	http://dx.doi.org/10.1109/TPEL.2006.886627	en
heal.language	English	en
heal.publicationDate	2007	en
heal.abstract	In this paper, a novel four-level inverter will be presented and analyzed. The proposed inverter topology, which is composed of a conventional two-level and a three-level neutral-point clamped (NPC) inverter, is suitable for high-voltage and high-power applications. The proposed inverter, when it is compared with the conventional four-level NPC pulsewidth modulation inverter, exhibits the following advantages: a) ability of changing the power losses distribution profile among the devices by selecting a suitable switching strategy; b) reduction of total inverter power semiconductor device losses; c) ability of bidirectional operation for all power semiconductor switches; and d) easy implementation using existing power semiconductor modules. The effect of conduction and switching losses profiles of the proposed inverter for different switching strategies is examined under different loads, power factors, and modulation indices. The dc-link capacitors voltages are effectively balanced via a proposed self-voltage balancing topology, without the need of isolated dc voltage sources or additional voltage stabilizing circuits. Finally, the theoretical results are confirmed by simulation and experimental results. © 2006 IEEE.	en
heal.publisher	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC	en
heal.journalName	IEEE Transactions on Power Electronics	en
dc.identifier.doi	10.1109/TPEL.2006.886627	en
dc.identifier.isi	ISI:000244302700017	en
dc.identifier.volume	22	en
dc.identifier.issue	1	en
dc.identifier.spage	149	en
dc.identifier.epage	159	en