dc.contributor.author |
Zouraraki, O |
en |
dc.contributor.author |
Yiannopoulos, K |
en |
dc.contributor.author |
Zakynthinos, P |
en |
dc.contributor.author |
Petrantonakis, D |
en |
dc.contributor.author |
Varvarigos, E |
en |
dc.contributor.author |
Poustie, A |
en |
dc.contributor.author |
Maxwell, G |
en |
dc.contributor.author |
Avramopoulos, H |
en |
dc.date.accessioned |
2014-03-01T01:26:27Z |
|
dc.date.available |
2014-03-01T01:26:27Z |
|
dc.date.issued |
2007 |
en |
dc.identifier.issn |
10411135 |
en |
dc.identifier.uri |
https://dspace.lib.ntua.gr/xmlui/handle/123456789/18085 |
|
dc.subject |
Mach-Zehnder interferometer (MZI) |
en |
dc.subject |
Optical buffering |
en |
dc.subject |
Time-slot interchanger |
en |
dc.subject.other |
Integrated circuits |
en |
dc.subject.other |
Mach-Zehnder interferometers |
en |
dc.subject.other |
Semiconductor optical amplifiers |
en |
dc.subject.other |
Cascaded programmable delay stages |
en |
dc.subject.other |
Optical buffering |
en |
dc.subject.other |
Time-slot interchager |
en |
dc.subject.other |
Optical switches |
en |
dc.title |
Implementation of an all-optical time-slot-interchanger architecture |
en |
heal.type |
journalArticle |
en |
heal.identifier.primary |
10.1109/LPT.2007.902331 |
en |
heal.identifier.secondary |
http://dx.doi.org/10.1109/LPT.2007.902331 |
en |
heal.publicationDate |
2007 |
en |
heal.abstract |
We demonstrate a wavelength-converter-based optical time-slot-interchanger. It consists of three cascaded programmable delay stages and employs the first hybrid integrated, on a chip, quadruple array of semiconductor optical amplifier Mach-Zehnder interferometer switches. It exhibits error-free operation with 10-Gb/s nonreturn-to-zero packets and a power penalty of 1.8 dB. © 2007 IEEE. |
en |
heal.journalName |
IEEE Photonics Technology Letters |
en |
dc.identifier.doi |
10.1109/LPT.2007.902331 |
en |
dc.identifier.volume |
19 |
en |
dc.identifier.issue |
17 |
en |
dc.identifier.spage |
1307 |
en |
dc.identifier.epage |
1309 |
en |