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A 1-V 5-GHz CMOS multiple magnetic feedback receiver front-end

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dc.contributor.author Vitzilaios, G en
dc.contributor.author Papananos, Y en
dc.contributor.author Theodoratos, G en
dc.date.accessioned 2014-03-01T01:27:38Z
dc.date.available 2014-03-01T01:27:38Z
dc.date.issued 2008 en
dc.identifier.issn 0018-9480 en
dc.identifier.uri https://dspace.lib.ntua.gr/xmlui/handle/123456789/18517
dc.subject CMOS analog circuits en
dc.subject Linearization techniques en
dc.subject Low-noise amplifier (LNA) en
dc.subject Mixer design en
dc.subject Receiver topology en
dc.subject.classification Engineering, Electrical & Electronic en
dc.subject.other Amplifiers (electronic) en
dc.subject.other Architectural design en
dc.subject.other Audio frequency amplifiers en
dc.subject.other CMOS integrated circuits en
dc.subject.other Computer networks en
dc.subject.other Electric potential en
dc.subject.other Microfluidics en
dc.subject.other Mixing en
dc.subject.other Technology en
dc.subject.other Topology en
dc.subject.other CMOS technologies en
dc.subject.other conversion gains en
dc.subject.other High gain en
dc.subject.other In order en
dc.subject.other Low noise amplifier (LNA) en
dc.subject.other Low voltage operations en
dc.subject.other Magnetic feedback en
dc.subject.other optimum performance en
dc.subject.other Receiver front ends en
dc.subject.other Reverse isolation en
dc.subject.other Third-order input intercept point (IIP3) en
dc.subject.other Multitasking en
dc.title A 1-V 5-GHz CMOS multiple magnetic feedback receiver front-end en
heal.type journalArticle en
heal.identifier.primary 10.1109/TMTT.2008.921752 en
heal.identifier.secondary http://dx.doi.org/10.1109/TMTT.2008.921752 en
heal.identifier.secondary 4511512 en
heal.language English en
heal.publicationDate 2008 en
heal.abstract In this paper, a receiver front-end module operating at 5 GHz and suitable for low-voltage operation is presented. The design consists of a single amplifying transistor low-noise amplifier topology that utilizes multiple magnetic feedback in order to simultaneously achieve high gain and high reverse isolation. In addition, a mixer topology for optimum performance regarding gain, noise, and linearity under low-voltage operation is presented. The design has been fabricated in IBM's 0.13-μm CMOS technology, and the measured performance indicates a receiver conversion gain of 22.3 dB, a noise figure of 2.64 dB, and a third-order input intercept point of +0.1 dBm. © 2008 IEEE. en
heal.publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC en
heal.journalName IEEE Transactions on Microwave Theory and Techniques en
dc.identifier.doi 10.1109/TMTT.2008.921752 en
dc.identifier.isi ISI:000256800700004 en
dc.identifier.volume 56 en
dc.identifier.issue 6 en
dc.identifier.spage 1338 en
dc.identifier.epage 1348 en


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