A magnetic feedback method for low-voltage CMOS LNA reverse-isolation enhancement

Vitzilaios, G; Papananos, Y

dc.contributor.author	Vitzilaios, G	en
dc.contributor.author	Papananos, Y	en
dc.date.accessioned	2014-03-01T01:27:41Z
dc.date.available	2014-03-01T01:27:41Z
dc.date.issued	2008	en
dc.identifier.issn	1549-7747	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/18542
dc.subject	CMOS RF IC design	en
dc.subject	Integrated low-noise amplifier (LNA)	en
dc.subject	Integrated transformers	en
dc.subject	Low voltage	en
dc.subject	Magnetic feedback technique	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Capacitance	en
dc.subject.other	CMOS integrated circuits	en
dc.subject.other	Topology	en
dc.subject.other	Transistors	en
dc.subject.other	Gate-drain overlap capacitance	en
dc.subject.other	Integrated transformers	en
dc.subject.other	Magnetic feedback	en
dc.subject.other	Reverse isolation	en
dc.subject.other	Low noise amplifiers	en
dc.title	A magnetic feedback method for low-voltage CMOS LNA reverse-isolation enhancement	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/TCSII.2007.914427	en
heal.identifier.secondary	http://dx.doi.org/10.1109/TCSII.2007.914427	en
heal.language	English	en
heal.publicationDate	2008	en
heal.abstract	A magnetic feedback method for enhancing the reverse isolation of low-voltage (1.2-V), single-transistor CMOS low-noise amplifiers (LNAs) is presented. The method neutralizes the gate-drain overlap capacitance of the amplifying transistor, allowing for adequate reverse isolation without gain reduction. The method does not require a differential LNA topology and input matching is facilitated since the degeneration inductor is not a part of a magnetic feedback loop. In addition, it allows for neutralizing the intrinsic part of the parasitic capacitance, which cannot be neglected in short-channel devices. Simulation results utilizing a standard 0.18-μm CMOS process indicate a 17-29-dB improvement in the reverse-isolation performance with minimal noise figure deterioration. © 2008 IEEE.	en
heal.publisher	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC	en
heal.journalName	IEEE Transactions on Circuits and Systems II: Express Briefs	en
dc.identifier.doi	10.1109/TCSII.2007.914427	en
dc.identifier.isi	ISI:000256053600006	en
dc.identifier.volume	55	en
dc.identifier.issue	5	en
dc.identifier.spage	414	en
dc.identifier.epage	418	en