The Analysis of System-Level Timing Failures Due to Interconnect Reliability Degradation

Guo, J; Papanikolaou, A; Stucchi, M; Croes, K; Tokei, Z; Catthoor, F

dc.contributor.author	Guo, J	en
dc.contributor.author	Papanikolaou, A	en
dc.contributor.author	Stucchi, M	en
dc.contributor.author	Croes, K	en
dc.contributor.author	Tokei, Z	en
dc.contributor.author	Catthoor, F	en
dc.date.accessioned	2014-03-01T01:29:18Z
dc.date.available	2014-03-01T01:29:18Z
dc.date.issued	2008	en
dc.identifier.issn	1530-4388	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/19213
dc.subject	Electromigration (EM)	en
dc.subject	interconnect reliability system-level analysis	en
dc.subject	time-dependent dielectric breakdown (TDDB)	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.classification	Physics, Applied	en
dc.subject.other	ELECTROMIGRATION	en
dc.subject.other	DIELECTRICS	en
dc.subject.other	BREAKDOWN	en
dc.subject.other	IMPACT	en
dc.subject.other	FILMS	en
dc.title	The Analysis of System-Level Timing Failures Due to Interconnect Reliability Degradation	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/TDMR.2008.2006986	en
heal.identifier.secondary	http://dx.doi.org/10.1109/TDMR.2008.2006986	en
heal.language	English	en
heal.publicationDate	2008	en
heal.abstract	The continuous scaling of feature dimensions and the introduction of new dielectric materials are pushing interconnects closer to their reliability limits. Degradation mechanisms are becoming more pronounced, making the interconnect lifetime a challenge at the level of process qualification. Moreover, these mechanisms exhibit new properties, such as gradual degradation of electrical parameters instead of abrupt breakdown phenomena. As a result, it becomes more likely that systems will fail because one of their transistors or wires becomes gradually too slow. These soft failures are not captured by existing tools. The methodology introduced in this paper estimates the impact of two dominant interconnect degradation mechanisms (electromigration and time-dependent dielectric breakdown) on the total system performance. This constitutes a first step toward system-level-driven reliability-aware design for interconnects.	en
heal.publisher	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC	en
heal.journalName	IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY	en
dc.identifier.doi	10.1109/TDMR.2008.2006986	en
dc.identifier.isi	ISI:000262163500005	en
dc.identifier.volume	8	en
dc.identifier.issue	4	en
dc.identifier.spage	652	en
dc.identifier.epage	663	en