Performance evaluation of the sparse matrix-vector multiplication on modern architectures

Goumas, G; Kourtis, K; Anastopoulos, N; Karakasis, V; Koziris, N

dc.contributor.author	Goumas, G	en
dc.contributor.author	Kourtis, K	en
dc.contributor.author	Anastopoulos, N	en
dc.contributor.author	Karakasis, V	en
dc.contributor.author	Koziris, N	en
dc.date.accessioned	2014-03-01T01:31:38Z
dc.date.available	2014-03-01T01:31:38Z
dc.date.issued	2009	en
dc.identifier.issn	0920-8542	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/19857
dc.subject	Multicore architectures	en
dc.subject	Performance evaluation	en
dc.subject	Scientific applications	en
dc.subject	Sparse matrix-vector multiplication	en
dc.subject.classification	Computer Science, Hardware & Architecture	en
dc.subject.classification	Computer Science, Theory & Methods	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	Commodity hardware	en
dc.subject.other	Micro architectures	en
dc.subject.other	Modern architectures	en
dc.subject.other	Multicore architectures	en
dc.subject.other	Multithreaded	en
dc.subject.other	Optimization process	en
dc.subject.other	Parallel version	en
dc.subject.other	Performance evaluation	en
dc.subject.other	Performance issues	en
dc.subject.other	Scientific applications	en
dc.subject.other	Sparse matrix-vector multiplication	en
dc.subject.other	Software architecture	en
dc.subject.other	Vectors	en
dc.subject.other	Online searching	en
dc.title	Performance evaluation of the sparse matrix-vector multiplication on modern architectures	en
heal.type	journalArticle	en
heal.identifier.primary	10.1007/s11227-008-0251-8	en
heal.identifier.secondary	http://dx.doi.org/10.1007/s11227-008-0251-8	en
heal.language	English	en
heal.publicationDate	2009	en
heal.abstract	In this paper, we revisit the performance issues of the widely used sparse matrix-vector multiplication (SpMxV) kernel on modern microarchitectures. Previous scientific work reports a number of different factors that may significantly reduce performance. However, the interaction of these factors with the underlying architectural characteristics is not clearly understood, a fact that may lead to misguided, and thus unsuccessful attempts for optimization. In order to gain an insight into the details of SpMxV performance, we conduct a suite of experiments on a rich set of matrices for three different commodity hardware platforms. In addition, we investigate the parallel version of the kernel and report on the corresponding performance results and their relation to each architecture's specific multithreaded configuration. Based on our experiments, we extract useful conclusions that can serve as guidelines for the optimization process of both single and multithreaded versions of the kernel. © 2008 Springer Science+Business Media, LLC.	en
heal.publisher	SPRINGER	en
heal.journalName	Journal of Supercomputing	en
dc.identifier.doi	10.1007/s11227-008-0251-8	en
dc.identifier.isi	ISI:000271673600003	en
dc.identifier.volume	50	en
dc.identifier.issue	1	en
dc.identifier.spage	36	en
dc.identifier.epage	77	en