Design of a low voltage-low power 3.1-10.6 GHz UWB RF front-end in a CMOS 65 nm technology

Simitsakis, P; Papananos, Y; Kytonaki, E-S

dc.contributor.author	Simitsakis, P	en
dc.contributor.author	Papananos, Y	en
dc.contributor.author	Kytonaki, E-S	en
dc.date.accessioned	2014-03-01T01:33:07Z
dc.date.available	2014-03-01T01:33:07Z
dc.date.issued	2010	en
dc.identifier.issn	1549-7747	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/20332
dc.subject	Common gate	en
dc.subject	direct conversion mixer	en
dc.subject	noise cancelling	en
dc.subject	RF front-end (RFFE)	en
dc.subject	ultra wideband (UWB)	en
dc.subject.classification	Engineering, Electrical & Electronic	en
dc.subject.other	65nm technology	en
dc.subject.other	Common gate amplifier	en
dc.subject.other	Common gates	en
dc.subject.other	Direct-conversion mixer	en
dc.subject.other	Flat frequency response	en
dc.subject.other	High voltage gain	en
dc.subject.other	Input matching	en
dc.subject.other	Local oscillators	en
dc.subject.other	Low noise	en
dc.subject.other	Low noise figure	en
dc.subject.other	Low Power	en
dc.subject.other	Low voltages	en
dc.subject.other	Noise canceling	en
dc.subject.other	Noise cancelling	en
dc.subject.other	RF front end	en
dc.subject.other	Voltage gain	en
dc.subject.other	Wide-band	en
dc.subject.other	Broadband amplifiers	en
dc.subject.other	Frequency response	en
dc.subject.other	Gain measurement	en
dc.subject.other	Mixers (machinery)	en
dc.subject.other	Noise figure	en
dc.subject.other	Ultra-wideband (UWB)	en
dc.title	Design of a low voltage-low power 3.1-10.6 GHz UWB RF front-end in a CMOS 65 nm technology	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/TCSII.2010.2082910	en
heal.identifier.secondary	http://dx.doi.org/10.1109/TCSII.2010.2082910	en
heal.identifier.secondary	5638130	en
heal.language	English	en
heal.publicationDate	2010	en
heal.abstract	In this brief, the design of a 3.1 to 10.6 GHz ultra wideband (UWB) RF front-end (RFFE) is presented. It employs a novel low noise common gate amplifier combined with a noise canceling circuit, that provides wideband input matching, high voltage gain and low noise figure in the whole band of operation. It also adopts a passive single balanced direct conversion mixer with a custom designed balun at its local oscillator (LO) input. The RFFE achieves 20.6 dB of voltage gain and it has adequately flat frequency response. Its noise figure is 3-3.8 dB and the CP1 at the input is -19.7 dBm. The circuit consumes only 10.8 mW from a 1.2 V supply and it was designed in IBM's CMOS 65 nm process. © 2010 IEEE.	en
heal.publisher	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC	en
heal.journalName	IEEE Transactions on Circuits and Systems II: Express Briefs	en
dc.identifier.doi	10.1109/TCSII.2010.2082910	en
dc.identifier.isi	ISI:000284362000001	en
dc.identifier.volume	57	en
dc.identifier.issue	11	en
dc.identifier.spage	833	en
dc.identifier.epage	837	en