Automatic resistor-generation and thick film circuit layout using the Magic layout editor

Avaritsiotis, JN; Stamoulis, G; Achtidas, SA

dc.contributor.author	Avaritsiotis, JN	en
dc.contributor.author	Stamoulis, G	en
dc.contributor.author	Achtidas, SA	en
dc.date.accessioned	2014-03-01T01:40:47Z
dc.date.available	2014-03-01T01:40:47Z
dc.date.issued	1991	en
dc.identifier.issn	00262692	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/23236
dc.relation.uri	http://www.scopus.com/inward/record.url?eid=2-s2.0-0026175314&partnerID=40&md5=82c0cd294149e24e27fb220cdcccf16c	en
dc.subject.other	Computer Aided Design	en
dc.subject.other	Integrated Circuits, Hybrid	en
dc.subject.other	Resistors	en
dc.subject.other	Solders	en
dc.subject.other	Layout editors	en
dc.subject.other	Magic layout editors	en
dc.subject.other	Resistor generation	en
dc.subject.other	Solder paste	en
dc.subject.other	Integrated Circuits, Thick Film	en
dc.title	Automatic resistor-generation and thick film circuit layout using the Magic layout editor	en
heal.type	journalArticle	en
heal.publicationDate	1991	en
heal.abstract	A technology file for the Magic layout editor has been developed to show the possibility of a design route which uses a CAD package not intended for hybrids, and as such it is considered to be a low cost approach to thick film CAD. Layout with design rule checking of multilayer hybrid circuits may be performed, consisting of two (or more) different metallization patterns with the possibility of using up to eight different resistor pastes, dielectrics, protective coating and solder paste. The thick film technology described is not meant to be indicative of good industrial practice, since the intention is to show how the technology file may be altered. The alterations performed provide for automatic resistor generation, device placement and automatic routing techniques in thick film circuits. Also, in single-layer technology, dielectric tiles are automatically created at metal crossings when an electric contact is not desired. © 1991.	en
heal.journalName	Microelectronics Journal	en
dc.identifier.volume	22	en
dc.identifier.issue	4	en
dc.identifier.spage	5	en
dc.identifier.epage	14	en