A formal method for hardware design using attribute grammars

Economakos, G; Papakonstantinou, G

dc.contributor.author	Economakos, G	en
dc.contributor.author	Papakonstantinou, G	en
dc.date.accessioned	2014-03-01T01:47:46Z
dc.date.available	2014-03-01T01:47:46Z
dc.date.issued	1999	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/25315
dc.subject	Attribute Grammar	en
dc.subject	Compiler Construction	en
dc.subject	Formal Method	en
dc.subject	Hardware Design	en
dc.subject	High Level Synthesis	en
dc.subject	Levels of Abstraction	en
dc.title	A formal method for hardware design using attribute grammars	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/ICECS.1999.812266	en
heal.identifier.secondary	http://dx.doi.org/10.1109/ICECS.1999.812266	en
heal.publicationDate	1999	en
heal.abstract	Recent advances in fabrication technology have pushed the digital designers' perspective towards higher levels of abstraction. While a lot of research work has been reported to support this demand, the development of automated high-level synthesis environments is still an experimental field. Previous work has shown that attribute grammars, used in traditional compiler construction, can also be effectively adopted to describe,	en
heal.journalName	Sealing Technology	en
dc.identifier.doi	10.1109/ICECS.1999.812266	en