Novel Si integrated inductor and transformer structures for RF IC design

Koutsoyannopoulos, Yorgos; Papananos, Yannis; Bantas, Sotiris; Alemanni, Carlo

dc.contributor.author	Koutsoyannopoulos, Yorgos	en
dc.contributor.author	Papananos, Yannis	en
dc.contributor.author	Bantas, Sotiris	en
dc.contributor.author	Alemanni, Carlo	en
dc.date.accessioned	2014-03-01T01:48:41Z
dc.date.available	2014-03-01T01:48:41Z
dc.date.issued	1999	en
dc.identifier.issn	02714310	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/25551
dc.relation.uri	http://www.scopus.com/inward/record.url?eid=2-s2.0-0032669687&partnerID=40&md5=2ef5ca9c0ebffedfa8b104535e8f94b1	en
dc.subject.other	Computer aided design	en
dc.subject.other	Crosstalk	en
dc.subject.other	Electric inductors	en
dc.subject.other	Electric transformers	en
dc.subject.other	Impedance matching (electric)	en
dc.subject.other	Three dimensional	en
dc.subject.other	Integrated inductor	en
dc.subject.other	Integrated transformers	en
dc.subject.other	Integrated circuit layout	en
dc.title	Novel Si integrated inductor and transformer structures for RF IC design	en
heal.type	journalArticle	en
heal.publicationDate	1999	en
heal.abstract	Planar and 3D Si passive inductive structures are presented, with respect to their application in RF ICs. The modeling of the structures is realized by the use of a custom CAD tool, SISP. It is shown how, for the first time, fast answers to complex questions can be obtained before fabrication, such as: Inductance boost of up to 600% in three-layer spiral inductors compared to planar ones, with no cost in quality factor; optimization of the insertion and return losses of integrated transformers under area reduction schemes; modeling of practical integrated baluns; effect of physical separation on the crosstalk between inductors. The accuracy of modeling results is established through measurements in an array of fabricated structures.	en
heal.publisher	IEEE, Piscataway, NJ, United States	en
heal.journalName	Proceedings - IEEE International Symposium on Circuits and Systems	en
dc.identifier.volume	2	en
dc.identifier.spage	II	en
dc.identifier.epage	573 - II-576	en