dc.contributor.author | Economakos, G | en |
dc.contributor.author | Panagopoulos, I | en |
dc.contributor.author | Papakonstantinou, G | en |
dc.date.accessioned | 2014-03-01T01:49:08Z | |
dc.date.available | 2014-03-01T01:49:08Z | |
dc.date.issued | 2000 | en |
dc.identifier.uri | https://dspace.lib.ntua.gr/xmlui/handle/123456789/25694 | |
dc.subject | Attribute Grammar | en |
dc.subject | Behavioral Synthesis | en |
dc.subject | Digital Circuits | en |
dc.subject | Hardware Design | en |
dc.subject | High Level Synthesis | en |
dc.subject | Register Transfer Level | en |
dc.title | Advances in Attribute Grammar Driven Hardware Compilation | en |
heal.type | journalArticle | en |
heal.publicationDate | 2000 | en |
heal.abstract | High-level or behavioral synthesis of digital circuits offers an effective way to deal with the increasing complexity of digital hardware design. A high-level synthesis tool transforms an abstract algorithmic description into a detailed register transfer level implementation. Since most of the times the algorithmic description is given in textual form, high-level synthesis transformations share common aspects with traditional compiler transformations | en |
heal.journalName | Information & Software Technology | en |
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