Experimental evaluation and improvements to linear scan register allocation

Sagonas, K; Stenman, E

dc.contributor.author	Sagonas, K	en
dc.contributor.author	Stenman, E	en
dc.date.accessioned	2014-03-01T01:52:38Z
dc.date.available	2014-03-01T01:52:38Z
dc.date.issued	2003	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/26677
dc.subject	Code Generation	en
dc.subject	Computer Architecture	en
dc.subject	Experimental Evaluation	en
dc.subject	Graph Coloring	en
dc.subject	Just In Time Compiler	en
dc.subject	Register Allocation	en
dc.title	Experimental evaluation and improvements to linear scan register allocation	en
heal.type	journalArticle	en
heal.identifier.primary	10.1002/spe.533	en
heal.identifier.secondary	http://dx.doi.org/10.1002/spe.533	en
heal.publicationDate	2003	en
heal.abstract	SUMMARY We report our experience from implementing and experimentally evaluating the performance of various register allocation schemes, focusing on the recently proposed linear scan register allocator .I n particular, we describe in detail our implementation of linear scan and report on its behavior both on register-rich and on register-poor computer architectures. We also extensively investigate how different options to the	en
heal.journalName	Software - Practice and Experience	en
dc.identifier.doi	10.1002/spe.533	en