PRO3: A Hybrid NPU Architecture

Papaefstathiou, I; Perissakis, S; Orphanoudakis, T; Nikolaou, N; Kornaros, G; Zervos, N; Konstantoulakis, G; Pnevmatikatos, D; Vlachos, K

dc.contributor.author	Papaefstathiou, I	en
dc.contributor.author	Perissakis, S	en
dc.contributor.author	Orphanoudakis, T	en
dc.contributor.author	Nikolaou, N	en
dc.contributor.author	Kornaros, G	en
dc.contributor.author	Zervos, N	en
dc.contributor.author	Konstantoulakis, G	en
dc.contributor.author	Pnevmatikatos, D	en
dc.contributor.author	Vlachos, K	en
dc.date.accessioned	2014-03-01T01:53:29Z
dc.date.available	2014-03-01T01:53:29Z
dc.date.issued	2004	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/27039
dc.subject	Semiconductor Devices	en
dc.subject	Protocol Data Unit	en
dc.title	PRO3: A Hybrid NPU Architecture	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/MM.2004.55	en
heal.identifier.secondary	http://dx.doi.org/10.1109/MM.2004.55	en
heal.publicationDate	2004	en
heal.abstract	As the telecommunications industry recovers from the severe downturn of recent years, data traffic continues to exhibit a rate of increase that outpaces advances in VLSI technology. Therefore, lowering overall system cost at network processing nodes and maximizing network utilization - hence revenues - remain extremely important objectives. To address these issues, new semiconductor devices called network processing units (NPUs)	en
heal.journalName	IEEE Micro	en
dc.identifier.doi	10.1109/MM.2004.55	en