A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications

Siozios, K; Koutroumpezis, G; Tatas, K; Vassiliadis, N; Kalenteridis, V; Pournara, H; Pappas, I; Soudris, D; Thanailakis, A; Nikolaidis, S; Siskos, S

dc.contributor.author	Siozios, K	en
dc.contributor.author	Koutroumpezis, G	en
dc.contributor.author	Tatas, K	en
dc.contributor.author	Vassiliadis, N	en
dc.contributor.author	Kalenteridis, V	en
dc.contributor.author	Pournara, H	en
dc.contributor.author	Pappas, I	en
dc.contributor.author	Soudris, D	en
dc.contributor.author	Thanailakis, A	en
dc.contributor.author	Nikolaidis, S	en
dc.contributor.author	Siskos, S	en
dc.date.accessioned	2014-03-01T01:54:06Z
dc.date.available	2014-03-01T01:54:06Z
dc.date.issued	2005	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/27195
dc.subject	Circuit Design	en
dc.subject	Digital Logic	en
dc.subject	Field Programmable Gate Array	en
dc.subject	fpga architecture	en
dc.subject	Interconnection Network	en
dc.subject	Low Power	en
dc.subject	Power Consumption	en
dc.subject	Power Efficiency	en
dc.subject	configurable logic block	en
dc.title	A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications	en
heal.type	journalArticle	en
heal.identifier.primary	10.1093/ietisy/e88-d.7.1369	en
heal.identifier.secondary	http://dx.doi.org/10.1093/ietisy/e88-d.7.1369	en
heal.publicationDate	2005	en
heal.abstract	SUMMARY A complete system for the implementation of digital logic in a Field-Programmable Gate Array (FPGA) platform is introduced. The novel power-efficient FPGA architecture was designed and simulated in STM 0.18µm CMOS technology. The detailed design and circuit char- acteristics of the Configurable Logic Block, the interconnection network, the switch box and the connection box were determined and evaluated in	en
heal.journalName	Ieice Transactions	en
dc.identifier.doi	10.1093/ietisy/e88-d.7.1369	en