A 320 Gb/s-Throughput Capable 2 $\,\times\,$2 Silicon-Plasmonic Router Architecture for Optical Interconnects

Papaioannou, S; Vyrsokinos, K; Tsilipakos, O; Pitilakis, A; Hassan, K; Weeber, J; Markey, L; Dereux, A; Bozhevolnyi, S; Miliou, A; Kriezis, E; Pleros, N

dc.contributor.author	Papaioannou, S	en
dc.contributor.author	Vyrsokinos, K	en
dc.contributor.author	Tsilipakos, O	en
dc.contributor.author	Pitilakis, A	en
dc.contributor.author	Hassan, K	en
dc.contributor.author	Weeber, J	en
dc.contributor.author	Markey, L	en
dc.contributor.author	Dereux, A	en
dc.contributor.author	Bozhevolnyi, S	en
dc.contributor.author	Miliou, A	en
dc.contributor.author	Kriezis, E	en
dc.contributor.author	Pleros, N	en
dc.date.accessioned	2014-03-01T02:00:49Z
dc.date.available	2014-03-01T02:00:49Z
dc.date.issued	2011	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/29142
dc.subject	Design Support	en
dc.subject	Fem Simulation	en
dc.subject	Finite Element Method	en
dc.subject	Frequency Domain	en
dc.subject	Integrated Circuit	en
dc.subject	Optical Filters	en
dc.subject	Optical Interconnect	en
dc.subject	Optical Resonator	en
dc.subject	Optical Switch	en
dc.subject	Optical Waveguide	en
dc.subject	Ring Resonator	en
dc.subject	Silicon On Insulator	en
dc.subject	Simulation Environment	en
dc.subject	Spectral Response	en
dc.subject	Surface Plasmon Polariton	en
dc.subject	Three Dimensional	en
dc.subject	Non Return To Zero	en
dc.subject	Second Order	en
dc.subject	Transfer Function	en
dc.title	A 320 Gb/s-Throughput Capable 2 $\,\times\,$2 Silicon-Plasmonic Router Architecture for Optical Interconnects	en
heal.type	journalArticle	en
heal.identifier.primary	10.1109/JLT.2011.2167315	en
heal.identifier.secondary	http://dx.doi.org/10.1109/JLT.2011.2167315	en
heal.publicationDate	2011	en
heal.abstract	We demonstrate a 2 2 silicon-plasmonic router ar- chitecture with 320 Gb/s throughput capabilities for optical in- terconnect applications. The proposed router platform relies on a novel dual-ring Dielectric-Loaded Surface Plasmon Polariton (DLSPP) 2 2 switch heterointegrated on a Silicon-on-Insulator (SOI) photonic motherboard that is responsible for traffic multi- plexing and header processing functionalities. We present exper- imental results of	en
heal.journalName	IEEE/OSA Journal of Lightwave Technology	en
dc.identifier.doi	10.1109/JLT.2011.2167315	en