dc.contributor.author |
Sotiriadis, PP |
en |
dc.contributor.author |
Galanopoulos, K |
en |
dc.date.accessioned |
2014-03-01T02:08:40Z |
|
dc.date.available |
2014-03-01T02:08:40Z |
|
dc.date.issued |
2012 |
en |
dc.identifier.issn |
15498328 |
en |
dc.identifier.uri |
https://dspace.lib.ntua.gr/xmlui/handle/123456789/29697 |
|
dc.subject |
Clock generation |
en |
dc.subject |
digital-to-frequency converter |
en |
dc.subject |
direct digital period synthesis |
en |
dc.subject |
direct digital synthesis |
en |
dc.subject |
flying adder |
en |
dc.subject |
frequency spurs |
en |
dc.subject |
frequency synthesis |
en |
dc.subject |
jitter |
en |
dc.subject |
phase accumulator |
en |
dc.subject.other |
Clock generation |
en |
dc.subject.other |
digital-to-frequency converter |
en |
dc.subject.other |
Direct digital period synthesis |
en |
dc.subject.other |
Direct digital synthesis |
en |
dc.subject.other |
Flying-adder |
en |
dc.subject.other |
frequency spurs |
en |
dc.subject.other |
Frequency synthesis |
en |
dc.subject.other |
Phase accumulators |
en |
dc.subject.other |
CMOS integrated circuits |
en |
dc.subject.other |
Direct digital control systems |
en |
dc.subject.other |
Jitter |
en |
dc.title |
Direct all-digital frequency synthesis techniques, spurs suppression, and deterministic jitter correction |
en |
heal.type |
journalArticle |
en |
heal.identifier.primary |
10.1109/TCSI.2012.2191875 |
en |
heal.identifier.secondary |
http://dx.doi.org/10.1109/TCSI.2012.2191875 |
en |
heal.identifier.secondary |
6190729 |
en |
heal.publicationDate |
2012 |
en |
heal.abstract |
Direct all-digital frequency synthesizers are favored by modern nanoscale CMOS technologies but suffer from strong frequency spurs and timing irregularities. To counter these drawbacks various jitter-correction and spurs-suppression techniques have been proposed. This paper presents a comprehensive literature review and a comparative study of such techniques, applied to popular direct all-digital frequency synthesis cores, identifying their strengths and weaknesses. © 2004-2012 IEEE. |
en |
heal.journalName |
IEEE Transactions on Circuits and Systems I: Regular Papers |
en |
dc.identifier.doi |
10.1109/TCSI.2012.2191875 |
en |
dc.identifier.volume |
59 |
en |
dc.identifier.issue |
5 |
en |
dc.identifier.spage |
958 |
en |
dc.identifier.epage |
968 |
en |