Comparative evaluation of single-phase SMR converters with active power factor correction

Kandianis, A; Manias, SN

dc.contributor.author	Kandianis, A	en
dc.contributor.author	Manias, SN	en
dc.date.accessioned	2014-03-01T02:40:59Z
dc.date.available	2014-03-01T02:40:59Z
dc.date.issued	1994	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/30308
dc.subject	Power Converter	en
dc.subject	Semiconductor Devices	en
dc.subject	Active Power Factor Correction	en
dc.subject.other	Capacitors	en
dc.subject.other	Electric currents	en
dc.subject.other	Electric filters	en
dc.subject.other	Electric inductors	en
dc.subject.other	Electric losses	en
dc.subject.other	Electric network topology	en
dc.subject.other	Electric rectifiers	en
dc.subject.other	Electric resistance	en
dc.subject.other	Pulse width modulation	en
dc.subject.other	Semiconductor diodes	en
dc.subject.other	Semiconductor switches	en
dc.subject.other	Active power factor correction	en
dc.subject.other	Control circuit	en
dc.subject.other	Power semiconductor parameters	en
dc.subject.other	Switch mode rectifier	en
dc.subject.other	Switching diode current	en
dc.subject.other	Switching stresses	en
dc.subject.other	Power converters	en
dc.title	Comparative evaluation of single-phase SMR converters with active power factor correction	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1109/IECON.1994.397784	en
heal.identifier.secondary	http://dx.doi.org/10.1109/IECON.1994.397784	en
heal.publicationDate	1994	en
heal.abstract	In this paper, an attempt is made to compare and evaluate three well known and accepted SMR topologies with Active Power Factor Correction (APFC), based on the criteria of switching stresses, efficiency, complexity of the control circuit and number of semiconductor devices used. To make this task easier, typical values of power semiconductor parameters, for a medium power converter are used. As a result, the best-suited topology for active input current waveshaping can be chosen for small to medium power applications. Finally, simulated key waveforms are obtained for all three topologies, which are used in the evaluation process.	en
heal.publisher	IEEE, Los Alamitos, CA, United States	en
heal.journalName	IECON Proceedings (Industrial Electronics Conference)	en
dc.identifier.doi	10.1109/IECON.1994.397784	en
dc.identifier.volume	1	en
dc.identifier.spage	244	en
dc.identifier.epage	249	en