Efficient utilization of on-chip inductors in silicon RF IC design using a novel CAD tool; The LNA paradigm

Papananos, Yannis; Koutsoyannopoulos, Yorgos

dc.contributor.author	Papananos, Yannis	en
dc.contributor.author	Koutsoyannopoulos, Yorgos	en
dc.date.accessioned	2014-03-01T02:41:32Z
dc.date.available	2014-03-01T02:41:32Z
dc.date.issued	1998	en
dc.identifier.issn	02714310	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/30517
dc.subject	Design Guideline	en
dc.subject.other	Computer aided design	en
dc.subject.other	Computer simulation	en
dc.subject.other	Computer software	en
dc.subject.other	Electric inductors	en
dc.subject.other	Semiconducting silicon	en
dc.subject.other	Spiral inductor simulation program (SISP)	en
dc.subject.other	Integrated circuit layout	en
dc.title	Efficient utilization of on-chip inductors in silicon RF IC design using a novel CAD tool; The LNA paradigm	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1109/ISCAS.1998.705226	en
heal.identifier.secondary	http://dx.doi.org/10.1109/ISCAS.1998.705226	en
heal.publicationDate	1998	en
heal.abstract	A CAD tool for modeling planar and multi-layer polygonal integrated inductors on silicon substrates has been developed. The tool can be used in the efficient design of RF ICs containing on-chip inductors. The accuracy and reliability of the software is established through measurement results. The CAD tool is then used in the extraction of design guidelines for the development of inductor structures suitable for a given application. This procedure is demonstrated with the design of an LNA.	en
heal.publisher	IEEE, Piscataway, NJ, United States	en
heal.journalName	Proceedings - IEEE International Symposium on Circuits and Systems	en
dc.identifier.doi	10.1109/ISCAS.1998.705226	en
dc.identifier.volume	6	en
dc.identifier.spage	118	en
dc.identifier.epage	121	en