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Load balancing hybrid programming models for SMP clusters and fully permutable loops

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dc.contributor.author Drosinos, N en
dc.contributor.author Koziris, N en
dc.date.accessioned 2014-03-01T02:43:24Z
dc.date.available 2014-03-01T02:43:24Z
dc.date.issued 2005 en
dc.identifier.issn 15302016 en
dc.identifier.uri https://dspace.lib.ntua.gr/xmlui/handle/123456789/31384
dc.subject Coarse Grained en
dc.subject General Methods en
dc.subject Hybrid Model en
dc.subject Hybrid Parallel Programming en
dc.subject Load Balance en
dc.subject Message Passing en
dc.subject Nested Loops en
dc.subject Programming Model en
dc.subject Smp Cluster en
dc.subject.other Coarse grain hybrid models en
dc.subject.other Hybrid parallel programming en
dc.subject.other Load balancing en
dc.subject.other Micro kernel benchmarks en
dc.subject.other Computational methods en
dc.subject.other Computer programming en
dc.subject.other Hybrid integrated circuits en
dc.subject.other Information technology en
dc.subject.other Mathematical models en
dc.subject.other Optimization en
dc.subject.other Parallel processing systems en
dc.title Load balancing hybrid programming models for SMP clusters and fully permutable loops en
heal.type conferenceItem en
heal.identifier.primary 10.1109/ICPPW.2005.46 en
heal.identifier.secondary http://dx.doi.org/10.1109/ICPPW.2005.46 en
heal.identifier.secondary 1488684 en
heal.publicationDate 2005 en
heal.abstract This paper emphasizes on load balancing issues associated with hybrid programming models for the parallelization of fully permutable nested loops onto SMP clusters. Hybrid parallel programming models usually suffer from intrinsic load imbalance between threads, mainly because most existing message passing libraries generally provide limited multi-threading support, allowing only the master thread to perform inter-node message passing communication. In order to mitigate this effect, we propose a generic method for the application of static load balancing on the coarse-grain hybrid model for the appropriate distribution of the computational load to the working threads. We experimentally evaluate the efficiency of the proposed scheme against a micro-kernel benchmark, and demonstrate the potential of such load balancing schem-esfor the extraction of maximum performance out of hybrid parallel programs. © 2005 IEEE. en
heal.journalName Proceedings of the International Conference on Parallel Processing Workshops en
dc.identifier.doi 10.1109/ICPPW.2005.46 en
dc.identifier.volume 2005 en
dc.identifier.spage 113 en
dc.identifier.epage 120 en


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