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A low-voltage CMOS LNA with multiple magnetic feedback for WLAN applications

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dc.contributor.author Vitzilaios, G en
dc.contributor.author Papananos, Y en
dc.contributor.author Theodoratos, G en
dc.contributor.author Vasilopoulos, A en
dc.date.accessioned 2014-03-01T02:43:49Z
dc.date.available 2014-03-01T02:43:49Z
dc.date.issued 2006 en
dc.identifier.issn 02714310 en
dc.identifier.uri https://dspace.lib.ntua.gr/xmlui/handle/123456789/31522
dc.subject High Frequency en
dc.subject Low Noise Amplifier en
dc.subject Low Voltage en
dc.subject Noise Figure en
dc.subject Positive Feedback en
dc.subject.other CMOS integrated circuits en
dc.subject.other Feedback en
dc.subject.other Natural frequencies en
dc.subject.other Topology en
dc.subject.other Transistors en
dc.subject.other Low-Noise-Amplifier (LNA) en
dc.subject.other Monolithic transformer en
dc.subject.other Noise Figure (NF) en
dc.subject.other Amplifiers (electronic) en
dc.title A low-voltage CMOS LNA with multiple magnetic feedback for WLAN applications en
heal.type conferenceItem en
heal.identifier.primary 10.1109/ISCAS.2006.1693630 en
heal.identifier.secondary http://dx.doi.org/10.1109/ISCAS.2006.1693630 en
heal.identifier.secondary 1693630 en
heal.publicationDate 2006 en
heal.abstract A CMOS Low-Noise-Amplifier (LNA) topology that utilizes multiple monolithic transformer magnetic feedback is presented. The proposed topology permits negative and positive feedback to be applied constructively, in order to simultaneously neutralize the gate-drain overlap capacitance of the amplifying transistor and achieve high gain at high frequencies when driving an on-chip capacitance. It also allows for a stable design with adequate gain and large reverse isolation without Noise Figure (NF) degradation. Simulation results indicate voltage conversion gain of 17 dB, NF of 1.6 dB and third-order input intercept point (IIP3) of 13 dBm. The design is being implemented in a 0.13 μm CMOS technology. © 2006 IEEE. en
heal.journalName Proceedings - IEEE International Symposium on Circuits and Systems en
dc.identifier.doi 10.1109/ISCAS.2006.1693630 en
dc.identifier.spage 4503 en
dc.identifier.epage 4506 en


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