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FPGA-based design of a large moduli multiplier for public-key cryptographic systems

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dc.contributor.author Al-Khaleel, O en
dc.contributor.author Papachristou, C en
dc.contributor.author Wolff, F en
dc.contributor.author Pekmestzi, K en
dc.date.accessioned 2014-03-01T02:44:03Z
dc.date.available 2014-03-01T02:44:03Z
dc.date.issued 2006 en
dc.identifier.uri https://dspace.lib.ntua.gr/xmlui/handle/123456789/31644
dc.subject Elliptic Curve en
dc.subject Hardware Implementation en
dc.subject Modular Multiplication en
dc.subject Public Key en
dc.subject.other Cryptography en
dc.subject.other Embedded systems en
dc.subject.other Field programmable gate arrays (FPGA) en
dc.subject.other Hardware en
dc.subject.other Pipelines en
dc.subject.other Array multiplication en
dc.subject.other Bit lengths en
dc.subject.other Computer designs en
dc.subject.other Cryptographic systems en
dc.subject.other Cryptosystems en
dc.subject.other Elliptic curves en
dc.subject.other Embedded devices en
dc.subject.other Encryption keys en
dc.subject.other FPGA devices en
dc.subject.other Hardware implementations en
dc.subject.other International conferences en
dc.subject.other Modular Multiplication en
dc.subject.other Modular multipliers en
dc.subject.other Montgomery's multiplication algorithm en
dc.subject.other Overall performance en
dc.subject.other Frequency multiplying circuits en
dc.title FPGA-based design of a large moduli multiplier for public-key cryptographic systems en
heal.type conferenceItem en
heal.identifier.primary 10.1109/ICCD.2006.4380834 en
heal.identifier.secondary http://dx.doi.org/10.1109/ICCD.2006.4380834 en
heal.identifier.secondary 4380834 en
heal.publicationDate 2006 en
heal.abstract High secure cryptographic systems require large bit-length encryption keys which presents a challenge to their efficient hardware implementation especially in embedded devices. Modular multiplication is the core operation in well known cryptosystems like RSA and Elliptic Curve (ECC). Therefore, it is important to employ efficient modular multiplications techniques to improve the overall performance of the cryptographic system. We present a modular multiplier based on the ordinary Montgomery's multiplication algorithm and a new array multiplication scheme to perform the multiplication. The new modular multiplier is scalable and can be used for large bit-lengths. We also implement the modular multiplier into the Virtex4 FPGA devices and we show that our technique has better performance when compared with other schemes. To implement large bitlength multiplications we used a novel partitioning and pipeline folding scheme to fit at least 512-bit modular multiplications on a single FPGA. ©2006 IEEE. en
heal.journalName IEEE International Conference on Computer Design, ICCD 2006 en
dc.identifier.doi 10.1109/ICCD.2006.4380834 en
dc.identifier.spage 314 en
dc.identifier.epage 319 en


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