Physical design implementation of segmented buses to reduce communication energy

Guo, J; Papanikolaou, A; Marchal, P; Catthoor, F

dc.contributor.author	Guo, J	en
dc.contributor.author	Papanikolaou, A	en
dc.contributor.author	Marchal, P	en
dc.contributor.author	Catthoor, F	en
dc.date.accessioned	2014-03-01T02:44:09Z
dc.date.available	2014-03-01T02:44:09Z
dc.date.issued	2006	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/31712
dc.subject	Community Networks	en
dc.subject	Distributed Memory	en
dc.subject	Embedded System	en
dc.subject	Energy Consumption	en
dc.subject	Energy Cost	en
dc.subject	Energy Dissipation	en
dc.subject	Energy Optimization	en
dc.subject	Low Power	en
dc.subject	Memory Hierarchy	en
dc.subject	New Technology	en
dc.subject	Physical Design	en
dc.subject	Macro Block	en
dc.title	Physical design implementation of segmented buses to reduce communication energy	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1145/1118299.1118311	en
heal.identifier.secondary	http://dx.doi.org/10.1145/1118299.1118311	en
heal.publicationDate	2006	en
heal.abstract	The amount of energy consumed for interconnecting the IP-blocks is increasing significantly due to the suboptimal scaling of long wires. To limit this energy penalty, segmented buses have gained interest in the architectural community. However, the netlist topology and the physical design stage significantly influence the final communication energy cost. We present in this paper an automated way to implement	en
heal.journalName	Asia and South Pacific Design Automation Conference	en
dc.identifier.doi	10.1145/1118299.1118311	en