A BISR architecture for embedded memories

Pekmestzi, K; Axelos, N; Sideris, I; Moshopoulos, N

dc.contributor.author	Pekmestzi, K	en
dc.contributor.author	Axelos, N	en
dc.contributor.author	Sideris, I	en
dc.contributor.author	Moshopoulos, N	en
dc.date.accessioned	2014-03-01T02:45:00Z
dc.date.available	2014-03-01T02:45:00Z
dc.date.issued	2008	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/32093
dc.subject	Defect Density	en
dc.subject	Fault Coverage	en
dc.subject	High Efficiency	en
dc.subject	Statistical Analysis	en
dc.subject.other	Data storage equipment	en
dc.subject.other	Maintenance	en
dc.subject.other	Repair	en
dc.subject.other	Embedded memories	en
dc.subject.other	Fault coverage	en
dc.subject.other	High defect densities	en
dc.subject.other	High-efficiency	en
dc.subject.other	Low area	en
dc.subject.other	Memory defects	en
dc.subject.other	Memory overheads	en
dc.subject.other	On-line testing	en
dc.subject.other	Simulation results	en
dc.subject.other	Statistical analysis	en
dc.subject.other	Cache memory	en
dc.title	A BISR architecture for embedded memories	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1109/IOLTS.2008.21	en
heal.identifier.secondary	http://dx.doi.org/10.1109/IOLTS.2008.21	en
heal.identifier.secondary	4567077	en
heal.publicationDate	2008	en
heal.abstract	In this paper a BISR architecture for embedded memories is presented. The proposed scheme utilises a multiple bank cache-like memory for repairs. Statistical analysis is used for minimisation of the total resources required to achieve a very high fault coverage. Simulation results show that the proposed BISR scheme is characterised by high efficiency and low area overhead, even for high defect densities. On a 4Mbit memory and an average number of 1024 memory defects per IC, a repair ratio of 100% and over 90% require less than 2% and 1% memory overhead respectively. ©2008 IEEE.	en
heal.journalName	Proceedings - 14th IEEE International On-Line Testing Symposium, IOLTS 2008	en
dc.identifier.doi	10.1109/IOLTS.2008.21	en
dc.identifier.spage	149	en
dc.identifier.epage	154	en