A high-speed radix-4 multiplexer-based array multiplier

Bekiaris, D; Pekmestzi, KZ; Papachristou, C

dc.contributor.author	Bekiaris, D	en
dc.contributor.author	Pekmestzi, KZ	en
dc.contributor.author	Papachristou, C	en
dc.date.accessioned	2014-03-01T02:45:02Z
dc.date.available	2014-03-01T02:45:02Z
dc.date.issued	2008	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/32105
dc.subject	Array multiplier	en
dc.subject	Modified booth	en
dc.subject	Multiplexer-based	en
dc.subject	Radix-4 multiplier	en
dc.subject.other	Frequency multiplying circuits	en
dc.subject.other	Lakes	en
dc.subject.other	Multiplexing	en
dc.subject.other	Synthesis (chemical)	en
dc.subject.other	Area overheads	en
dc.subject.other	Array multiplier	en
dc.subject.other	Critical times	en
dc.subject.other	M Technologies	en
dc.subject.other	Modified booth	en
dc.subject.other	Multiplexer-based	en
dc.subject.other	Partial products	en
dc.subject.other	Radix-4 multiplier	en
dc.subject.other	Multiplexing equipment	en
dc.title	A high-speed radix-4 multiplexer-based array multiplier	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1145/1366110.1366139	en
heal.identifier.secondary	http://dx.doi.org/10.1145/1366110.1366139	en
heal.publicationDate	2008	en
heal.abstract	This paper presents a new radix-4 multiplexer-based array multiplier, based on a multiplication scheme shown in a previous work, where 4-to-1 multiplexers are used for the computation of partial products. In the proposed design, the rows of the array are reduced to the half, compared to the initial multiplexer-based scheme, as two bits from both operands are processed at each step. The proposed scheme is compared to the Modified-Booth array multiplier and to the initial multiplexer-based array scheme. The compared designs are coded in VHDL and synthesized using the TSMC 0.13μm technology library. The synthesis results of critical time and area show 11-22% improvement in critical time delay compared to the Modified-Booth array, in the expense of an area overhead of 3.8-16%. Compared to the initial multiplexer-based scheme, there is a significant improvement in terms of area and critical time. Copyright 2008 ACM.	en
heal.journalName	Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI	en
dc.identifier.doi	10.1145/1366110.1366139	en
dc.identifier.spage	115	en
dc.identifier.epage	118	en