Nanoparticles for charge storage using hybrid organic inorganic devices

Tsoukalas, D; Kolliopoulou, S; Dimitrakis, P; Normand, P; Petty, MC

dc.contributor.author	Tsoukalas, D	en
dc.contributor.author	Kolliopoulou, S	en
dc.contributor.author	Dimitrakis, P	en
dc.contributor.author	Normand, P	en
dc.contributor.author	Petty, MC	en
dc.date.accessioned	2014-03-01T02:45:40Z
dc.date.available	2014-03-01T02:45:40Z
dc.date.issued	2008	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/32323
dc.subject	Flash memory	en
dc.subject	Nanoparticles	en
dc.subject	Self-assembly	en
dc.subject	Wafer bonding	en
dc.subject.other	Data storage equipment	en
dc.subject.other	Electronic properties	en
dc.subject.other	Flash memory	en
dc.subject.other	Gold deposits	en
dc.subject.other	Materials	en
dc.subject.other	Nanoparticles	en
dc.subject.other	Self assembly	en
dc.subject.other	Semiconducting silicon compounds	en
dc.subject.other	Silicon wafers	en
dc.subject.other	Three dimensional	en
dc.subject.other	Vanadium	en
dc.subject.other	3-D architectures	en
dc.subject.other	Charge storages	en
dc.subject.other	Electrical characteristics	en
dc.subject.other	Functionalization	en
dc.subject.other	Gate oxides	en
dc.subject.other	Gate stack materials	en
dc.subject.other	Gold nanoparticles	en
dc.subject.other	Hybrid silicons	en
dc.subject.other	Langmuir-Blodgett techniques	en
dc.subject.other	Low temperatures	en
dc.subject.other	Memory cells	en
dc.subject.other	Memory devices	en
dc.subject.other	Memory windows	en
dc.subject.other	Mos fets	en
dc.subject.other	Organic insulators	en
dc.subject.other	Organic technologies	en
dc.subject.other	Organic-inorganic	en
dc.subject.other	Program/erase	en
dc.subject.other	Read-only memories	en
dc.subject.other	V grooves	en
dc.subject.other	Voltage pulse	en
dc.subject.other	Wafer bonding	en
dc.title	Nanoparticles for charge storage using hybrid organic inorganic devices	en
heal.type	conferenceItem	en
heal.identifier.primary	10.4028/www.scientific.net/AST.54.451	en
heal.identifier.secondary	http://dx.doi.org/10.4028/www.scientific.net/AST.54.451	en
heal.publicationDate	2008	en
heal.abstract	We present a concept for integration of low temperature fabricated memory devices in a 3-D architecture using a hybrid silicon-organic technology. The realization of electrically erasable read-only memory (EEPROM) like device is based on the fabrication of a V-groove SiGe MOSFET, the functionalization of a gate oxide followed by self-assembly of gold nanoparticles and finally, the deposition of an organic insulator by Langmuir-Blodgett (LB) technique. Such structures were processed at a temperature lower than 400°C following a process based on wafer bonding. The electrical characteristics of the final hybrid MISFET memory cells were evaluated in terms of memory window and program/erase voltage pulses. A model describing the memory characteristics, based on the electronic properties of the gate stack materials, is presented. © 2008 Trans Tech Publications, Switzerland.	en
heal.journalName	CIMTEC 2008 - Proceedings of the 3rd International Conference on Smart Materials, Structures and Systems - Smart Materials and Micro/Nanosystems	en
dc.identifier.doi	10.4028/www.scientific.net/AST.54.451	en
dc.identifier.volume	54	en
dc.identifier.spage	451	en
dc.identifier.epage	457	en