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Understanding the performance of sparse matrix-vector multiplication

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dc.contributor.author Goumas, G en
dc.contributor.author Kourtis, K en
dc.contributor.author Anastopoulos, N en
dc.contributor.author Karakasis, V en
dc.contributor.author Koziris, N en
dc.date.accessioned 2014-03-01T02:45:50Z
dc.date.available 2014-03-01T02:45:50Z
dc.date.issued 2008 en
dc.identifier.uri https://dspace.lib.ntua.gr/xmlui/handle/123456789/32417
dc.subject Perforation en
dc.subject Performance Evaluation en
dc.subject Sparse Matrix en
dc.subject.other Commodity hardware en
dc.subject.other Micro-architectures en
dc.subject.other Optimization processes en
dc.subject.other Performance issues en
dc.subject.other Sparse matrix-vector multiplication en
dc.subject.other Experiments en
dc.subject.other Lead en
dc.subject.other Online searching en
dc.subject.other Optimization en
dc.subject.other Vectors en
dc.subject.other Matrix algebra en
dc.title Understanding the performance of sparse matrix-vector multiplication en
heal.type conferenceItem en
heal.identifier.primary 10.1109/PDP.2008.41 en
heal.identifier.secondary http://dx.doi.org/10.1109/PDP.2008.41 en
heal.identifier.secondary 4457135 en
heal.publicationDate 2008 en
heal.abstract In this paper we revisit the performance issues of the widely used sparse matrix-vector multiplication (SpMxV) kernel on modern microarchitectures. Previous scientific work reports a number of different factors that may significantly reduce performance. However, the interaction of these factors with the underlying architectural characteristics is not clearly understood, a fact that may lead to misguided and thus unsuccessful attempts for optimization. In order to gain an insight on the details of SpMxV performance, we conduct a suite of experiments on a rich set of matrices for three different commodity hardware platforms. Based on our experiments we extract useful conclusions that can serve as guidelines for the subsequent optimization process of the kernel. © 2008 IEEE. en
heal.journalName Proceedings of the 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing, PDP 2008 en
dc.identifier.doi 10.1109/PDP.2008.41 en
dc.identifier.spage 283 en
dc.identifier.epage 292 en


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