A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs

Siozios, K; Pavlidis, VF; Soudris, D

dc.contributor.author	Siozios, K	en
dc.contributor.author	Pavlidis, VF	en
dc.contributor.author	Soudris, D	en
dc.date.accessioned	2014-03-01T02:45:56Z
dc.date.available	2014-03-01T02:45:56Z
dc.date.issued	2009	en
dc.identifier.issn	15301591	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/32463
dc.relation.uri	http://www.scopus.com/inward/record.url?eid=2-s2.0-70350075846&partnerID=40&md5=219e20343337837227721fc4f7961a87	en
dc.relation.uri	http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5090653	en
dc.relation.uri	http://portal.acm.org/citation.cfm?id=1874662	en
dc.relation.uri	http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=05090653	en
dc.relation.uri	http://portal.acm.org/ft_gateway.cfm?id=1874662&type=pdf&CFID=29576336&CFTOKEN=51534192	en
dc.relation.uri	http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=5090609&arnumber=5090653&count=326&index=39	en
dc.relation.uri	http://www.informatik.uni-trier.de/~ley/db/conf/date/date2009.html#SioziosPS09	en
dc.subject	3-D integration	en
dc.subject	CAD tools	en
dc.subject	FPGA	en
dc.subject	Interconnection architectures	en
dc.subject.other	3-D integration	en
dc.subject.other	Alternative technologies	en
dc.subject.other	CAD tools	en
dc.subject.other	Clock frequency	en
dc.subject.other	Design approaches	en
dc.subject.other	Evaluation results	en
dc.subject.other	FPGA	en
dc.subject.other	FPGA devices	en
dc.subject.other	Interconnect structures	en
dc.subject.other	Interconnection architecture	en
dc.subject.other	Interconnection architectures	en
dc.subject.other	Logic density	en
dc.subject.other	Performance limitations	en
dc.subject.other	Power Consumption	en
dc.subject.other	Reconfigurable architecture	en
dc.subject.other	Silicon area	en
dc.subject.other	Silicon layer	en
dc.subject.other	Computer aided design	en
dc.subject.other	Computer software	en
dc.subject.other	Energy dissipation	en
dc.subject.other	Three dimensional	en
dc.subject.other	Field programmable gate arrays (FPGA)	en
dc.title	A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs	en
heal.type	conferenceItem	en
heal.identifier.secondary	5090653	en
heal.publicationDate	2009	en
heal.abstract	Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencies and logic densities is also important for the Field-Programmable Gate Array (FPGA) paradigm. Threedimensional (3-D) integration can alleviate such performance limitations by accommodating a number of additional silicon layers. However, the benefits of 3-D integration have yet to be sufficiently investigated. In this paper, we propose a software-supported methodology to explore and evaluate 3-D FPGAs fabricated with alternative technologies. Based on the evaluation results, the proposed FPGA device improves speed and energy dissipation by approximately 38% and 26%, respectively, as compared to 2-D FPGAs. Furthermore, these gains are achieved in addition to reducing the interlayer connections, as compared to existing design approaches, leading to cheaper and more reliable architectures. © 2009 EDAA.	en
heal.journalName	Proceedings -Design, Automation and Test in Europe, DATE	en
dc.identifier.spage	172	en
dc.identifier.epage	177	en