dc.contributor.author |
Kroupis, N |
en |
dc.contributor.author |
Raghavan, P |
en |
dc.contributor.author |
Jayapala, M |
en |
dc.contributor.author |
Catthoor, F |
en |
dc.contributor.author |
Soudris, D |
en |
dc.date.accessioned |
2014-03-01T02:46:04Z |
|
dc.date.available |
2014-03-01T02:46:04Z |
|
dc.date.issued |
2009 |
en |
dc.identifier.uri |
https://dspace.lib.ntua.gr/xmlui/handle/123456789/32520 |
|
dc.subject |
Embedded System |
en |
dc.subject |
Energy Consumption |
en |
dc.subject |
Energy Efficient |
en |
dc.subject |
Nested Loops |
en |
dc.subject |
Real Time |
en |
dc.subject.other |
Compilation techniques |
en |
dc.subject.other |
Compiler techniques |
en |
dc.subject.other |
Energy consumption |
en |
dc.subject.other |
Execution time |
en |
dc.subject.other |
Generic architecture |
en |
dc.subject.other |
Handhelds |
en |
dc.subject.other |
Induction variables |
en |
dc.subject.other |
Loop control |
en |
dc.subject.other |
Loop controllers |
en |
dc.subject.other |
Nested-loops |
en |
dc.subject.other |
Outer loop |
en |
dc.subject.other |
Performance loss |
en |
dc.subject.other |
Real time constraints |
en |
dc.subject.other |
Embedded systems |
en |
dc.subject.other |
Program compilers |
en |
dc.subject.other |
Real time systems |
en |
dc.subject.other |
Wireless telecommunication systems |
en |
dc.subject.other |
Controllers |
en |
dc.title |
Compilation technique for loop overhead minimization |
en |
heal.type |
conferenceItem |
en |
heal.identifier.primary |
10.1109/DSD.2009.172 |
en |
heal.identifier.secondary |
http://dx.doi.org/10.1109/DSD.2009.172 |
en |
heal.identifier.secondary |
5350069 |
en |
heal.publicationDate |
2009 |
en |
heal.abstract |
Modern handheld embedded systems operate under stringent power and real-time constraints. These systems run highly data-dominated applications from multimedia and wireless domains. Most of these applications spend signi cant amount of execution time in nested-loops. In order to reduce the loop control overhead several loop controller architectures have been proposed in the past. In this paper we present a generic architecture and a compiler technique to signi cantly reduce the energy overhead related to execution of loop control instructions. The compiler technique not only maps the innermost loops but also maps the outer loops on to the loop controller architecture. Furthermore, we also reduce the number of division operations using induction variable analysis to improve energy ef ciency. We show that by utilizing the proposed technique, it is possible to reduce the energy consumption of the branch operations using these loop controller architectures by 25% on average with no performance loss. © 2009 IEEE. |
en |
heal.journalName |
12th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2009 |
en |
dc.identifier.doi |
10.1109/DSD.2009.172 |
en |
dc.identifier.spage |
419 |
en |
dc.identifier.epage |
426 |
en |