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Perfomance models for blocked sparse matrix-vector multiplication kernels

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dc.contributor.author Karakasis, V en
dc.contributor.author Goumas, G en
dc.contributor.author Koziris, N en
dc.date.accessioned 2014-03-01T02:46:17Z
dc.date.available 2014-03-01T02:46:17Z
dc.date.issued 2009 en
dc.identifier.issn 01903918 en
dc.identifier.uri https://dspace.lib.ntua.gr/xmlui/handle/123456789/32646
dc.subject Blocking en
dc.subject Performance models en
dc.subject Sparse matrix-vector multiplication en
dc.subject.other Blocking method en
dc.subject.other Blocking performance en
dc.subject.other Computational kernels en
dc.subject.other High demand en
dc.subject.other Indexing structures en
dc.subject.other Input matrices en
dc.subject.other Memory access en
dc.subject.other Memory bandwidths en
dc.subject.other Memory subsystems en
dc.subject.other Optimization techniques en
dc.subject.other Performance Model en
dc.subject.other Prefetching en
dc.subject.other Shape and size en
dc.subject.other Sparse matrices en
dc.subject.other Sparse matrix-vector multiplication en
dc.subject.other Storage formats en
dc.subject.other Knowledge based systems en
dc.subject.other Vectors en
dc.subject.other Matrix algebra en
dc.title Perfomance models for blocked sparse matrix-vector multiplication kernels en
heal.type conferenceItem en
heal.identifier.primary 10.1109/ICPP.2009.21 en
heal.identifier.secondary http://dx.doi.org/10.1109/ICPP.2009.21 en
heal.identifier.secondary 5362396 en
heal.publicationDate 2009 en
heal.abstract Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architecture. The main problem of SpMV is its high demands on memory bandwidth, which cannot yet be abudantly offered from modern commodity architectures. One of the most promising optimization techniques for SpMV is blocking, which can reduce the indexing structures for storing a sparse matrix, and therefore alleviate the pressure to the memory subsystem. However, blocking methods can severely degrade performance if not used properly. In this paper, we study and evaluate a number of representative blocking storage formats and present a performance model that can accurately select the most suitable blocking storage format and the corresponding block shape and size for a specific sparse matrix. Our model considers both the memory and computational part of the kernel, which can be non-negligible when applying blocking, and also assumes an overlapping of memory accesses and computations that modern commodity architectures can offer through hardware prefetching mechanisms. © 2009 IEEE. en
heal.journalName Proceedings of the International Conference on Parallel Processing en
dc.identifier.doi 10.1109/ICPP.2009.21 en
dc.identifier.spage 356 en
dc.identifier.epage 364 en


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