Custom multi-threaded dynamic memory management for multiprocessor system-on-chip platforms

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dc.contributor.author Xydis, S en
dc.contributor.author Bartzas, A en
dc.contributor.author Anagnostopoulos, I en
dc.contributor.author Soudris, D en
dc.contributor.author Pekmestzi, K en
dc.date.accessioned 2014-03-01T02:46:45Z
dc.date.available 2014-03-01T02:46:45Z
dc.date.issued 2010 en
dc.identifier.uri https://dspace.lib.ntua.gr/xmlui/handle/123456789/32820
dc.subject Automatic Generation en
dc.subject Building Block en
dc.subject Design Space en
dc.subject Dynamic Memory Management en
dc.subject Dynamic Networks en
dc.subject Experimental Evaluation en
dc.subject Multiprocessor System On Chip en
dc.subject Software Tool en
dc.subject Multi Processor System On Chip en
dc.subject.other Application-Specific en
dc.subject.other Automatically generated en
dc.subject.other Building blockes en
dc.subject.other Design spaces en
dc.subject.other Dynamic memory en
dc.subject.other Dynamic memory management en
dc.subject.other Dynamic network en
dc.subject.other Experimental evaluation en
dc.subject.other Multi processor system on chips en
dc.subject.other Multiprocessor system-on-chip platforms en
dc.subject.other Multithreaded en
dc.subject.other Parameterized en
dc.subject.other Runtimes en
dc.subject.other Software tool en
dc.subject.other Systematic exploration en
dc.subject.other Application specific integrated circuits en
dc.subject.other Arts computing en
dc.subject.other Computer architecture en
dc.subject.other Computer simulation en
dc.subject.other Multiprocessing systems en
dc.subject.other Network architecture en
dc.subject.other Programmable logic controllers en
dc.subject.other Software design en
dc.subject.other Storage allocation (computer) en
dc.subject.other Embedded systems en
dc.title Custom multi-threaded dynamic memory management for multiprocessor system-on-chip platforms en
heal.type conferenceItem en
heal.identifier.primary 10.1109/ICSAMOS.2010.5642078 en
heal.identifier.secondary http://dx.doi.org/10.1109/ICSAMOS.2010.5642078 en
heal.identifier.secondary 5642078 en
heal.publicationDate 2010 en
heal.abstract We address the problem of custom Dynamic Memory Management (DMM) in Multi-Processor System-on-Chip (MPSoC) architectures. Customization is enabled through the definition of a design space that captures in a global, modular and parameterized manner the primitive building blocks of multi-threaded DMM. A systematic exploration methodology is proposed to efficiently traverse the design space. Customized Pareto DMM configurations are automatically generated through the development of software tools implementing the proposed methodology. Experimental evaluation based on a real-life multithreaded dynamic network application show that the proposed methodology delivers higher quality (application-specific) solutions in comparison with state-of-the-art dynamic memory managers together with 62% exploration runtime reductions. ©2010 IEEE. en
heal.journalName Proceedings - 2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2010 en
dc.identifier.doi 10.1109/ICSAMOS.2010.5642078 en
dc.identifier.spage 102 en
dc.identifier.epage 109 en

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