Narouto: An open-source framework for supporting architecture-level exploration at heterogeneous FPGAs

Sidiropoulos, H; Siozios, K; Soudris, D

dc.contributor.author	Sidiropoulos, H	en
dc.contributor.author	Siozios, K	en
dc.contributor.author	Soudris, D	en
dc.date.accessioned	2014-03-01T02:46:53Z
dc.date.available	2014-03-01T02:46:53Z
dc.date.issued	2010	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/32917
dc.subject	CAD tool	en
dc.subject	Exploration framework	en
dc.subject	FPGA	en
dc.subject.other	CAD tool	en
dc.subject.other	Exploration framework	en
dc.subject.other	FPGA	en
dc.subject.other	FPGA devices	en
dc.subject.other	Open source frameworks	en
dc.subject.other	Open source tools	en
dc.subject.other	Computer aided design	en
dc.title	Narouto: An open-source framework for supporting architecture-level exploration at heterogeneous FPGAs	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1109/ICECS.2010.5724565	en
heal.identifier.secondary	http://dx.doi.org/10.1109/ICECS.2010.5724565	en
heal.identifier.secondary	5724565	en
heal.publicationDate	2010	en
heal.abstract	A novel framework for supporting architecture-level exploration for heterogeneous FPGA devices is introduced. This framework, named NAROUTO, is based on open-source tools in order to support further extensions and improvements. As compared to previous works, the introduced framework provides higher flexibility for application implementation, while it can also evaluate power/energy consumption. Experimental results prove that NAROUTO leads to significant area, power (about 82%) and performance (about 46%) improvements, as compared to existing solutions. ©2010 IEEE.	en
heal.journalName	2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings	en
dc.identifier.doi	10.1109/ICECS.2010.5724565	en
dc.identifier.spage	527	en
dc.identifier.epage	530	en