Towards supporting fault-tolerance in FPGAs

Siozios, K; Soudris, D; Pnevmatikatos, D

dc.contributor.author	Siozios, K	en
dc.contributor.author	Soudris, D	en
dc.contributor.author	Pnevmatikatos, D	en
dc.date.accessioned	2014-03-01T02:47:07Z
dc.date.available	2014-03-01T02:47:07Z
dc.date.issued	2010	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/33006
dc.subject	Fault Tolerant	en
dc.subject	Performance Improvement	en
dc.subject.other	Novel methodology	en
dc.subject.other	Performance improvements	en
dc.subject.other	Special purpose hardware	en
dc.subject.other	Target architectures	en
dc.subject.other	Fault tolerance	en
dc.subject.other	Quality assurance	en
dc.title	Towards supporting fault-tolerance in FPGAs	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1109/ISVLSI.2010.99	en
heal.identifier.secondary	http://dx.doi.org/10.1109/ISVLSI.2010.99	en
heal.identifier.secondary	5572836	en
heal.publicationDate	2010	en
heal.abstract	This paper proposes a novel methodology for improving reliability of FPGAs without requiring special purpose hardware. In contrast to related approaches that are applied uniformly over the target architecture, the proposed one insert redundancy only the critical for failure resources. Such an approach leads to reasonable performance improvement. © 2010 IEEE.	en
heal.journalName	Proceedings - IEEE Annual Symposium on VLSI, ISVLSI 2010	en
dc.identifier.doi	10.1109/ISVLSI.2010.99	en
dc.identifier.spage	446	en
dc.identifier.epage	447	en