dc.contributor.author |
Siozios, K |
en |
dc.contributor.author |
Papanikolaou, A |
en |
dc.contributor.author |
Soudris, D |
en |
dc.date.accessioned |
2014-03-01T02:47:18Z |
|
dc.date.available |
2014-03-01T02:47:18Z |
|
dc.date.issued |
2011 |
en |
dc.identifier.issn |
02714310 |
en |
dc.identifier.uri |
https://dspace.lib.ntua.gr/xmlui/handle/123456789/33062 |
|
dc.subject |
3d integration |
en |
dc.subject |
Consumer Demand |
en |
dc.subject |
Consumer Electronics |
en |
dc.subject |
Field Programmable Gate Array |
en |
dc.subject |
Form Factor |
en |
dc.subject |
Functional Integration |
en |
dc.subject |
High Performance |
en |
dc.subject |
Integrated Circuit |
en |
dc.subject |
Integrated Circuit Interconnections |
en |
dc.subject |
Ip Networks |
en |
dc.subject |
Non Volatile Memory |
en |
dc.subject |
Personal Computer |
en |
dc.subject |
Power Consumption |
en |
dc.subject |
Process Integration |
en |
dc.subject |
Smart Phone |
en |
dc.subject |
Solid Modeling |
en |
dc.subject |
Technology Scaling |
en |
dc.subject |
Three Dimensional |
en |
dc.subject |
User Experience |
en |
dc.subject |
Through Silicon Via |
en |
dc.subject.other |
3d systems |
en |
dc.subject.other |
CAD tool |
en |
dc.subject.other |
Consumer electronics products |
en |
dc.subject.other |
Conventional design |
en |
dc.subject.other |
Form factors |
en |
dc.subject.other |
Integrated systems |
en |
dc.subject.other |
Lower-power consumption |
en |
dc.subject.other |
Manufacturing process |
en |
dc.subject.other |
Semiconductor technology |
en |
dc.subject.other |
Three dimensional chip stacking |
en |
dc.subject.other |
Approximation theory |
en |
dc.subject.other |
Consumer electronics |
en |
dc.subject.other |
Semiconductor device manufacture |
en |
dc.subject.other |
Three dimensional |
en |
dc.subject.other |
Computer aided design |
en |
dc.title |
CAD tools for designing 3D integrated systems |
en |
heal.type |
conferenceItem |
en |
heal.identifier.primary |
10.1109/ISCAS.2011.5938044 |
en |
heal.identifier.secondary |
http://dx.doi.org/10.1109/ISCAS.2011.5938044 |
en |
heal.identifier.secondary |
5938044 |
en |
heal.publicationDate |
2011 |
en |
heal.abstract |
Expectations of consumer for future consumer electronics devices put significant strain on conventional design and manufacturing processes. Integrating more functionality in a smaller form factor with lower power consumption and cost is pushing traditional semiconductor technology scaling to its limits. Three dimensional chip stacking is touted as the silver bullet technology that can keep Moore's momentum and fuel the next wave of consumer electronics products. This paper outlines a generic methodology to design 3D systems. © 2011 IEEE. |
en |
heal.journalName |
Proceedings - IEEE International Symposium on Circuits and Systems |
en |
dc.identifier.doi |
10.1109/ISCAS.2011.5938044 |
en |
dc.identifier.spage |
2229 |
en |
dc.identifier.epage |
2232 |
en |