Design and implementation of a CMOS operational amplifier architecture with dual common-mode feedback loop

Papananos, Y; Tsividis, Y

dc.contributor.author	Papananos, Y	en
dc.contributor.author	Tsividis, Y	en
dc.date.accessioned	2014-03-01T02:48:24Z
dc.date.available	2014-03-01T02:48:24Z
dc.date.issued	1996	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/33794
dc.relation.uri	http://www.scopus.com/inward/record.url?eid=2-s2.0-0030362418&partnerID=40&md5=4a1246a1f0ac2ecbe5838e266e0ead47	en
dc.subject.other	CMOS integrated circuits	en
dc.subject.other	Feedback amplifiers	en
dc.subject.other	Gain control	en
dc.subject.other	VLSI circuits	en
dc.subject.other	Dual common mode feedback loop	en
dc.subject.other	Single common mode feedback loop	en
dc.subject.other	Operational amplifiers	en
dc.title	Design and implementation of a CMOS operational amplifier architecture with dual common-mode feedback loop	en
heal.type	conferenceItem	en
heal.publicationDate	1996	en
heal.abstract	In this paper, the design and VLSI implementation of a fully balanced op amp in CMOS technology is presented. The op amp uses a dual common-mode (CM) feedback loop architecture which is compared against single CM feedback loop techniques. Experimental measurements on the fabricated chip are presented.	en
heal.publisher	IEEE, Piscataway, NJ, United States	en
heal.journalName	Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems	en
dc.identifier.volume	2	en
dc.identifier.spage	904	en
dc.identifier.epage	907	en