dc.contributor.author |
Economakos, G |
en |
dc.contributor.author |
Papakonstantinou, G |
en |
dc.contributor.author |
Tsanakas, P |
en |
dc.date.accessioned |
2014-03-01T02:48:37Z |
|
dc.date.available |
2014-03-01T02:48:37Z |
|
dc.date.issued |
1998 |
en |
dc.identifier.uri |
https://dspace.lib.ntua.gr/xmlui/handle/123456789/33959 |
|
dc.subject |
Attribute Grammar |
en |
dc.subject |
Control Dependence |
en |
dc.subject |
Data Dependence |
en |
dc.subject |
Hardware Synthesis |
en |
dc.subject |
High Level Synthesis |
en |
dc.subject |
Power Optimization |
en |
dc.subject |
Resource Constraint |
en |
dc.subject |
Scheduling Algorithm |
en |
dc.subject |
Time Constraint |
en |
dc.title |
Incorporating multi-pass attribute grammars for the high-level synthesis of ASICs |
en |
heal.type |
conferenceItem |
en |
heal.identifier.primary |
10.1145/330560.330568 |
en |
heal.identifier.secondary |
http://dx.doi.org/10.1145/330560.330568 |
en |
heal.publicationDate |
1998 |
en |
heal.abstract |
Attribute grammars have been used extensively in every phase of traditional compiler eonr ruction. Previous work has shown that they can also be effectively adopted to handle scheduling algorithms in higda-levet hardware synthesis. However, since scheduling in modem systems require consideration of many interdependent factors (data dependencies, control dependencies, timing constraints, resource constraints, power optimization), the one-pass techniques presented earlier |
en |
heal.journalName |
ACM Symposium on Applied Computing |
en |
dc.identifier.doi |
10.1145/330560.330568 |
en |